Datasheet

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PMBus Addressing
Figure 1 and the accompanying table display the recommended resistor values
for hard-wiring PMBus addresses (1% tolerance resistors recommended): The
address is set in the form of two octal (0 to 7) digits, with each pin setting one
digit. The resistor values for each digit is shown below.
The SA0 and SA1 pins can be confi gured with a resistor to GND according to
the following equation.
PMBus Address = 8 x (SA0value) + (SA1 value)
C0 and C1 are 4.7nF capacitors, which are recommended for correct
addressing. If the calculated PMBus address is 0d, 11d or 12d, PMBus address
119d is assigned instead. From a system point of view, the user shall also be
aware of further limitations of the addresses as stated in the PMBus Specifi ca-
tion. It is not recommended to keep the SA0 and SA1 pins left open.
PMBus Commands
The products are designed to be PMBus compliant. The following tables list
the implemented PMBus read commands. For more detailed information see
“PMBus Power System Management Protocol Specifi cation, Part I – General
Requirements, Transport and Electrical Interface” and “PMBus Power System
Management Protocol, Part II – Command Language.”
Figure 1. Schematic of Connection of Address Resistors
SA0
SA1
R
1
C1
C0
R
0
Digit (SA0, SA1 index) Resistor Value [kΩ]
010
122
233
347
468
5 100
6 150
7 220
OVERALL
DBQ/DVQ Series
420W Digital Fully Regulated Intermediate
DC-DC Bus Converter
MDC_DBQ Series.B02Δ Page 22 of 31
CMD Command Name
1
SMBus
Transaction Type:
Writing Data
SMBus
Transaction Type:
Reading Data
Number
Of Data
Bytes
01h OPERATION
2
Write Byte Read Byte 1
02h ON_OFF_CONFIG
3
Write Byte Read Byte 1
03h CLEAR_FAULTS Send byte N/A 0
10h WRITE_PROTECT Write Byte Read Byte 1
11h STORE_DEFAULT_ALL
4
Send byte N/A 0
12h RESTORE_DEFAULT_ALL
4
Send byte N/A 0
15h STORE_USER_ALL
4
Send byte N/A 0
16h RESTORE_USER_ALL
4
Send byte N/A 0
19h CAPABILITY N/A Read Byte 1
20h VOUT_MODE N/A Read Byte 1
21h VOUT_COMMAND Write Word Read Word 2
22h VOUT_TRIM Write Word Read Word 2
25h VOUT_MARGIN_HIGH Write Word Read Word 2
26h VOUT_MARGIN_LOW Write Word Read Word 2
28h VOUT_DROOP Write Word
16
Read Word 2
40h VOUT_OV_FAULT_LIMIT Write Word Read Word 2
41h VOUT_OV_FAULT_RESPONSE
5
Write Byte Read Byte 1
42h VOUT_OV_WARN_LIMIT Write Word Read Word 2
46h IOUT_OC_FAULT_LIMIT Write Word Read Word 2
47h IOUT_OC_FAULT_RESPONSE
6
Write Byte Read Byte 1
4Ah IOUT_OC_WARN_LIMIT Write Word Read Word 2
4Fh OT_FAULT_LIMIT Write Word Read Word 2
50h OT_FAULT_RESPONSE
5
Write Byte Read Byte 1
51h OT_WARN_LIMIT Write Word Read Word 2
55h VIN_OV_FAULT_LIMIT Write Word Read Word 2
56h VIN_OV_FAULT_RESPONSE
7
Write Byte Read Byte 1
57h VIN_OV_WARN_LIMIT Write Word Read Word 2
58h VIN_UV_WARN_LIMIT Write Word Read Word 2
59h VIN_UV_FAULT_LIMIT Write Word Read Word 2
5Ah VIN_UV_FAULT_RESPONSE
7
Write Byte Read Byte 1
5Eh POWER_GOOD_ON Write Word Read Word 2
5Fh POWER_GOOD_OFF Write Word Read Word 2