Specifications

PART 3 – Analog SocketModems Chapter 10 – SocketModem (MT5692SMI)
Multi-Tech Systems, Inc. Universal Socket Hardware Guide for Developers (S000342P) 160
Pin Descriptions for a Parallel SocketModem Device
Pin #
Signal
I/O
Description
1
Tip
I/O
Tip Signal from Telco. Tip connection to the phone line (RJ-11 Pin 4). The SocketModem is Tip/Ring
polarity insensitive.
2
Ring
I/O
Ring Signal from Telco. Ring connection to the phone line (RJ-11 Pin 3). The SocketModem is
Tip/Ring polarity insensitive.
24
–
RESET I
Device Reset (with pull-up). The active low –RESET input resets the device logic and returns the
configuration of the device to the original factory default values or "stored values" in the NVRAM.
–RESET is tied to VCC through a time-constant circuit for “Power-on-Reset” functionality. The
SocketModem is ready to accept commands after a fixed amount of time (“X” Time) after power-on or
reset.
Model Time Constant "X" Time Minimum Reset Pulse*
MT5692SMI 250 ms 6 seconds 100us
*The SocketModem device may respond to a shorter reset pulse.
Reset Line Interface for the MT5692SMI. The modem’s reset line employs a 10K pull up resistor. If
an open collector driver is to be used, run that output to the modem only and use a separate driver for
other embedded components. The modem’s reset signal may also be driven by a circuit that both
sinks and sources current if desired. It is also important to note that these modems do not require an
external reset. They have their own internal reset circuitry and voltage monitor and will function
correctly even if the reset input is open.
Modem Reset (with weak pull-up). The active low –RESET input resets the SocketModem logic and
returns the AT command set to the original factory default values or to "stored values" in NVRAM. The
modem is ready to accept commands within 6.5 seconds of power-on or reset. Reset must be
asserted for a minimum of 300 ns.
25
A0
I
Host Bus Address Line 0. During a host read or write operation, A0 selects an internal 16C450 or
16C550-compatible register. The state of the divisor latch access bit (DLAB) affects the selection of
certain registers.
26
DGND
GND
Digital Ground
30
INT
O
Host Bus Interrupt. INT output is set high when the receiver error flag, receiver data available,
transmitter holding register empty, or modem status interrupt have an active high condition. INT is
reset low upon the appropriate interrupt service or master reset operation.
31
A1
I
Host Bus Address Line 1. During a host read or write operation, A1 selects an internal 16C450 or
16C550-compatible register. The state of the divisor latch access bit (DLAB) affects the selection of
certain registers.
32
–WR
I
Host Bus Write. –WR is an active low, write control input. When –DS is low, –WR low allows the
host to write data or control words into a selected modem register.
33
–RD
I
Host Bus Read. –RD is an active low, read control input. When –DS is low, –RD low allows the host
to read status information or data from a selected modem register.
34 A2 I
Host Bus Address Line 2. During a host read or write operation, A2 selects an internal 16C450 or
16C550-compatible register. The state of the divisor latch access bit (DLAB) affects the selection of
certain registers.
40
–DS
I
Host Bus Device Select. –DS input low enables the modem for read or write.
61
VCC
PWR
+5V or 3.3V Supply (depends upon model).
63
AGND
GND
Analog Ground.
This is tied common with DGND on the SocketModem. To minimize potential
ground noise issues, connect audio circuit return to AGND.
64
SPKR
O
Speaker. Dual purpose output for call progress signals or speakerphone functions.
Call Progress signaling on MT5692SMI is a square wave output that can be optionally connected to a
low-cost single-ended speaker; e.g., a sounducer or an analog speaker circuit.
Speakerphone Output on the MT5692SMI is under the control of +FCLASS. This is a single-ended
analog output. SPKR is tied directly to the CODEC. One side of a differential AC output coupled
through a 6.8K ohm resistor and capacitor.