Specifications
Table Of Contents
- INTRODUCTION
- OVERVIEW
- SPECIFICATIONS
- ARCHITECTURE OVERVIEW
- MASTER CLOCK
- PLD1
- PLD2
- CCD CLOCK DRIVERS
- CCD BIAS VOLTAGES
- CCD IMAGE SENSOR
- A/D CONVERTER: ANALOG DEVICES AD9816
- EMITTER FOLLOWER
- AC COUPLING CAPACITOR
- POWER ON CLEAR / RESET
- JTAG HEADER
- UNIT INTEGRATION TIME
- J6 INPUT CONNECTOR
- J4 OUTPUT CONNECTOR
- J7 INTEGRATION SYNC
- J1, J2 IMAGER BOARD CONNECTORS
- POWER SUPPLIES
- J5 POWER CONNECTOR
- BOARD REQUIREMENTS:
- CONFIGURATION MODES
- CCD IMAGER BOARDS
- TIMING
- OTHER PARAMETERS
- FIGURES, TABLES, TIMING DIAGRAMS, AND PERFORMANCE DATA
- REFERENCES
- ORDERING INFORMATION
- WARNING: LIFE SUPPORT APPLICATIONS POLICY
- REVISION CHANGES
- APPENDIX

INTRODUCTION
The Kodak
Digital Science
TM
KAF Series CCD Digital Reference Evaluation Board provides a powerful platform to quickly
and easily implement a Kodak Digital Science Full Frame or Blue Plus Full Frame CCD image sensor in a prototype
imaging system.
The Evaluation Board also serves as a useful reference design that will save considerable time and cost in the
development of a product prototype. The programmable logic architecture, bias supplies, clock drivers and analog signal
processing chain can be readily used, with application specific modifications, in a camera production design.
The Evaluation Board is designed to be flexible, and has the ability to operate many different Kodak Full Frame image
sensors at different operating frequencies. Consult Image Sensor Solutions (ISS) to obtain information for optimizing the
reference design to operate a specific image sensor at a specific operating frequency.
OVERVIEW
The KAF Series Digital Reference Evaluation Board serves as a complete, self-contained, CCD image acquisition sub-
system. The user simply applies power, and an IMAGE_AQUIRE TTL pulse to begin capturing digital images. Differential
TTL frame grabber sync pulses (Frame, Pixel and Line rate) are provided to facilitate easy connection to a frame grabber.
In the still capture mode, application of the IMAGE_ACQUIRE signal results in flushing of the CCD, then integration, then
clocking out of a full frame of image data. In free-run mode, an acquisition signal is not needed; the board is free running
and continuous frames of 12 bit information stream out.
CCD Reference
Evaluation Board
Image_Acquire
12 Bit Output
©Eastman Kodak Company, 2008 www.kodak.com/go/imagers Revision 8.0 MTD/PS-0215 p5










