Specifications
Table Of Contents
- INTRODUCTION
- OVERVIEW
- SPECIFICATIONS
- ARCHITECTURE OVERVIEW
- MASTER CLOCK
- PLD1
- PLD2
- CCD CLOCK DRIVERS
- CCD BIAS VOLTAGES
- CCD IMAGE SENSOR
- A/D CONVERTER: ANALOG DEVICES AD9816
- EMITTER FOLLOWER
- AC COUPLING CAPACITOR
- POWER ON CLEAR / RESET
- JTAG HEADER
- UNIT INTEGRATION TIME
- J6 INPUT CONNECTOR
- J4 OUTPUT CONNECTOR
- J7 INTEGRATION SYNC
- J1, J2 IMAGER BOARD CONNECTORS
- POWER SUPPLIES
- J5 POWER CONNECTOR
- BOARD REQUIREMENTS:
- CONFIGURATION MODES
- CCD IMAGER BOARDS
- TIMING
- OTHER PARAMETERS
- FIGURES, TABLES, TIMING DIAGRAMS, AND PERFORMANCE DATA
- REFERENCES
- ORDERING INFORMATION
- WARNING: LIFE SUPPORT APPLICATIONS POLICY
- REVISION CHANGES
- APPENDIX
CONNECTOR PINOUTS
Imager Board Connectors J1, J2
Connector Pin Assignment Connector Pin Assignment
J1 1 N.C. J2 1 VSUB
J1 2 VSUB J2 2 RESET
J1 3 N.C. J2 3 VSUB
J1 4 VSUB J2 4 N.C.
J1 5 N.C. J2 5 VSUB
J1 6 VSUB J2 6 N.C.
J1 7 VLG J2 7 VSUB
J1 8 VSUB J2 8 N.C.
J1 9 N.C. J2 9 VSUB
J1 10 VSUB J2 10 N.C.
J1 11 VDD J2 11 VSUB
J1 12 VSUB J2 12 H2
J1 13 VDD J2 13 VSUB
J1 14 VSUB J2 14 H1
J1 15 N.C. J2 15 VSUB
J1 16 VSUB J2 16 Video
J1 17 LOD/GAURD J2 17 VSUB
J1 18 VSUB J2 18 VOG
J1 19 N.C. J2 19 VSUB
J1 20 VSUB J2 20 VRD
J1 21 N.C. J2 21 VSUB
J1 22 VSUB J2 22 V2
J1 23 Neg 10V trace J2 23 VSUB
J1 24 VSUB J2 24 V1
©Eastman Kodak Company, 2008 www.kodak.com/go/imagers Revision 8.0 MTD/PS-0215 p37