Specifications
Table Of Contents
- INTRODUCTION
- OVERVIEW
- SPECIFICATIONS
- ARCHITECTURE OVERVIEW
- MASTER CLOCK
- PLD1
- PLD2
- CCD CLOCK DRIVERS
- CCD BIAS VOLTAGES
- CCD IMAGE SENSOR
- A/D CONVERTER: ANALOG DEVICES AD9816
- EMITTER FOLLOWER
- AC COUPLING CAPACITOR
- POWER ON CLEAR / RESET
- JTAG HEADER
- UNIT INTEGRATION TIME
- J6 INPUT CONNECTOR
- J4 OUTPUT CONNECTOR
- J7 INTEGRATION SYNC
- J1, J2 IMAGER BOARD CONNECTORS
- POWER SUPPLIES
- J5 POWER CONNECTOR
- BOARD REQUIREMENTS:
- CONFIGURATION MODES
- CCD IMAGER BOARDS
- TIMING
- OTHER PARAMETERS
- FIGURES, TABLES, TIMING DIAGRAMS, AND PERFORMANCE DATA
- REFERENCES
- ORDERING INFORMATION
- WARNING: LIFE SUPPORT APPLICATIONS POLICY
- REVISION CHANGES
- APPENDIX
SYSTEM NOISE FLOOR VS. OPERATING FREQUENCY
Frequency
(MHz)
Noise Floor
(Electrons)
Dynamic Range*
(Bits)
Dynamic Range*
(dB)
El/ADU System Gain
1 40 11.49 69.17 29.2 2.5X
2 48 11.23 67.59 29.2 2.5X
3 50 11.17 67.23 29.2 2.5X
4 54 11.06 66.57 29.2 2.5X
5 56 11.00 66.25 29.2 2.5X
6 58 10.95 65.95 29.2 2.5X
Note: Dynamic Range Calculated using KAF1600 Sensor, Full Well = 115000 Electrons Measured
0
10
20
30
40
50
60
01234567
Frequency (MHz)
Noise Floor (Electrons)
10
10.4
10.8
11.2
11.6
12
01234567
Frequency (MHz)
Bits
Figure 15: Measured Performance: Dynamic Range
©Eastman Kodak Company, 2008 www.kodak.com/go/imagers Revision 8.0 MTD/PS-0215 p35