Specifications
Table Of Contents
- INTRODUCTION
- OVERVIEW
- SPECIFICATIONS
- ARCHITECTURE OVERVIEW
- MASTER CLOCK
- PLD1
- PLD2
- CCD CLOCK DRIVERS
- CCD BIAS VOLTAGES
- CCD IMAGE SENSOR
- A/D CONVERTER: ANALOG DEVICES AD9816
- EMITTER FOLLOWER
- AC COUPLING CAPACITOR
- POWER ON CLEAR / RESET
- JTAG HEADER
- UNIT INTEGRATION TIME
- J6 INPUT CONNECTOR
- J4 OUTPUT CONNECTOR
- J7 INTEGRATION SYNC
- J1, J2 IMAGER BOARD CONNECTORS
- POWER SUPPLIES
- J5 POWER CONNECTOR
- BOARD REQUIREMENTS:
- CONFIGURATION MODES
- CCD IMAGER BOARDS
- TIMING
- OTHER PARAMETERS
- FIGURES, TABLES, TIMING DIAGRAMS, AND PERFORMANCE DATA
- REFERENCES
- ORDERING INFORMATION
- WARNING: LIFE SUPPORT APPLICATIONS POLICY
- REVISION CHANGES
- APPENDIX
Linearity
0
20000
40000
60000
80000
100000
120000
140000
160000
180000
0 2000 4000 6000 8000 10000
Integration Time (ms)
Electron s
Linearity Cu rve
Full Well = 11 500 0 Ele ctrons
Figure 13: Measured Linearity
(Measurements taken using KAF-1600 sensor)
Photon Transfer Curve (5MHz, Gain = 2.5)
1
10
100
1000
1 10 10 0 1000 10 000
Signal (A/D Counts)
Noise (A/D Counts)
Slop e = El/ADU = 29.2
electron s
Noise Floor = 1.92 Counts
= 56 electrons
Figure 14: Measured Performance: Noise Floor
(Measurements taken using KAF-1600 sensor)
©Eastman Kodak Company, 2008 www.kodak.com/go/imagers Revision 8.0 MTD/PS-0215 p34