Specifications
Table Of Contents
- INTRODUCTION
- OVERVIEW
- SPECIFICATIONS
- ARCHITECTURE OVERVIEW
- MASTER CLOCK
- PLD1
- PLD2
- CCD CLOCK DRIVERS
- CCD BIAS VOLTAGES
- CCD IMAGE SENSOR
- A/D CONVERTER: ANALOG DEVICES AD9816
- EMITTER FOLLOWER
- AC COUPLING CAPACITOR
- POWER ON CLEAR / RESET
- JTAG HEADER
- UNIT INTEGRATION TIME
- J6 INPUT CONNECTOR
- J4 OUTPUT CONNECTOR
- J7 INTEGRATION SYNC
- J1, J2 IMAGER BOARD CONNECTORS
- POWER SUPPLIES
- J5 POWER CONNECTOR
- BOARD REQUIREMENTS:
- CONFIGURATION MODES
- CCD IMAGER BOARDS
- TIMING
- OTHER PARAMETERS
- FIGURES, TABLES, TIMING DIAGRAMS, AND PERFORMANCE DATA
- REFERENCES
- ORDERING INFORMATION
- WARNING: LIFE SUPPORT APPLICATIONS POLICY
- REVISION CHANGES
- APPENDIX
©Eastman Kodak Company, 2008 www.kodak.com/go/imagers Revision 8.0 MTD/PS-0215 p20
Power ON
CLEAR_ALL
SET-UP
INITIALIZE
STILL/FREE-
RUN?
IMAGE
ACQUIRE?
INTEGRATION
INTEGRATION_DONE
V_TRANSFER
H_TRANSFER
V_ENABLE
H_XFER_DONE
LINE_CHECK
V_XFER_DONE = LOW
V_XFER_DONE = HIGH
FLUSH
STILL
NO
YESFREE-RUN
CLOCKING
STATE MACHINE
CLOCK = EIGHTH CLOCK
RESET = POWER ON CLEAR
Figure 2: Clocking State Machine