Specifications
Table Of Contents
- INTRODUCTION
- OVERVIEW
- SPECIFICATIONS
- ARCHITECTURE OVERVIEW
- MASTER CLOCK
- PLD1
- PLD2
- CCD CLOCK DRIVERS
- CCD BIAS VOLTAGES
- CCD IMAGE SENSOR
- A/D CONVERTER: ANALOG DEVICES AD9816
- EMITTER FOLLOWER
- AC COUPLING CAPACITOR
- POWER ON CLEAR / RESET
- JTAG HEADER
- UNIT INTEGRATION TIME
- J6 INPUT CONNECTOR
- J4 OUTPUT CONNECTOR
- J7 INTEGRATION SYNC
- J1, J2 IMAGER BOARD CONNECTORS
- POWER SUPPLIES
- J5 POWER CONNECTOR
- BOARD REQUIREMENTS:
- CONFIGURATION MODES
- CCD IMAGER BOARDS
- TIMING
- OTHER PARAMETERS
- FIGURES, TABLES, TIMING DIAGRAMS, AND PERFORMANCE DATA
- REFERENCES
- ORDERING INFORMATION
- WARNING: LIFE SUPPORT APPLICATIONS POLICY
- REVISION CHANGES
- APPENDIX

AD_IN/EX MODES
The board comes with an Analog Devices AD9816 12 bit A/D converter on board. This A/D has several features, such as
multiple configurations, programmable gain, and offset registers which require initialization and/or programming on
power up. The programming of these registers is done via a three wire serial interface.
EXT:
A three wire serial interface is provided on the J6 connector of the board, and the AD9816 registers can be controlled
remotely via these when the A/D_IN/EX Jumper (SW4) is set to EXT. See Figure 3: AD9816 Register Configuration for
AD9816 serial timing diagrams and information.
INT:
If it is not desired to control the programming of the A/D’s registers remotely, set Jumper SW4 to INT. PLD2 contains a
state machine that serially loads in the following default values to these registers upon power up.
A/D Default Register Settings:
No. of channels: 1
Mode: CDS Mode
Input Span: 3V
Channel Selected: Green
Red PGA Gain*: 1
Green PGA Gain: 1
Blue PGA Gain*: 1
Red Offset*: 0mv
Green Offset: 0mv
Blue Offset*: 0mv
Note: Although the Red and Blue channels are not used, these registers are still initialized to these default settings
©Eastman Kodak Company, 2008 www.kodak.com/go/imagers Revision 8.0 MTD/PS-0215 p13










