Specifications

Chapter 2 Functions

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Note 1: Both output signals of phase-A and phase-B are settled at LOW-level. To settle at LOW-level, at

least three pulses are outputted. Make a sequence for the host device ignoring outputted pulses while the

phase-Z is LOW-level before generating an absolute pulse train, and during other LOW-level duration of

the phase-Z signal.

Note 2: An absolute pulse train for single-turn encoder is outputted after around 1 ms of outputting

phase-Z signal.

Note 3: The servo-ON signal is unaccepted until completing the transmission of a set of absolute pulse

trains by the [absolute data request] signal.

Note 4: The [alarm 57] occurs if the single-turn encoder rotates more than 127 resolvable position while

the multi-turn counter is transmitting an absolute pulse train.

Acquiring multi-turn count

For FWD revolution of the encoder (motor), the phase-A signal has 90 degree phase shift against

phase-B signal, and for REV revolution the phase-A signal has 90 degree phase delay against phase-B

signal as shown below.

Increasing or decreasing the multi-turn counter of the host device should be discriminated by the phase

shift or delay of phase-A against phase-B. Acquire the signal at rising edge of the signal.

Acquiring single-turn encoder and incremental pulse trains

For FWD revolution of the encoder (motor), the phase-A signal has 90 degree phase shift against

phase-B signal, and for REV revolution the phase-A signal has 90 degree phase delay against phase-B

signal as shown below.

Increasing or decreasing the single-turn encoder counter of the host device should be discriminated by

the phase shift or delay of phase-A against phase-B. Acquire the signal at rising and falling edge of the

signal.

Phase

Count 0 +1 +2 +3 0 −1 −2 −3

FWD revolution

Phase

REV revolution

Phase

FWD revolution

REV revolution

Count 0

-1

-2

-3

-4