Specifications
XIO3130
www.ti.com
SLLS693F–MAY 2007–REVISED JANUARY 2010
4.3.15 I/O Base Register
This read/write register specifies the lower limit of the I/O addresses that the XIO3130 downstream port
forwards downstream.
PCI register offset: 1Ch
Register type: Read/Write; Read Only
Default value: 01h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 1
Table 4-55. Bit Descriptions – I/O Base Register
BIT FIELD NAME ACCESS DESCRIPTION
I/O base. This field defines the bottom address of the I/O address range that is used to
determine when to forward I/O transactions from one interface to the other. These bits
7:4 IOBASE rw correspond to address bits [15:12] in the I/O address. The lower 12 bits are assumed to be 0.
The 16 bits that correspond to address bits [31:16] of the I/O address are defined in the I/O
Base Upper 16 Bits register.
3:0 IOTYPE r I/O type. This field is read-only 01h, which indicates 32 bit I/O addressing support.
4.3.16 I/O Limit Register
This read/write register specifies the upper limit of the I/O addresses that the XIO3130 downstream port
forwards downstream.
PCI register offset: 1Dh
Register type: Read/Write; Read Only
Default value: 01h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 1
Table 4-56. Bit Descriptions – I/O Limit Register
BIT FIELD NAME ACCESS DESCRIPTION
I/O limit. This field defines the top address of the I/O address range that is used to determine
when to forward I/O transactions from one interface to the other. These bits correspond to
7:4 IOLIMIT rw address bits [15:12] in the I/O address. The lower 12 bits are assumed to be FFFh. The 16
bits that correspond to address bits [31:16] of the I/O address are defined in the I/O Limit
Upper 16 Bits register.
3:0 IOTYPE r I/O type. This field is read-only 01h, which indicates 32-bit I/O addressing support.
4.3.17 Secondary Status Register
The Secondary Status register provides information about the downstream port PCI Express interface.
PCI register offset: 1Eh
Register type: Read Only; Clear by a Write of One; Hardware Update
Default value: 0000h
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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