Specifications
XIO3130
SLLS693F–MAY 2007 –REVISED JANUARY 2010
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4.2.57 Serial Bus Slave Address Register
The Serial Bus Slave Address register is used to indicate the address of the device being targeted by the
serial bus cycle. This register also indicates whether the cycle will be a read or a write cycle. Writing to
this register initiates the cycle on the serial interface. This register is reset with PERST. The default value
corresponds to a serial EEPROM slave address of 7’b101_0000.
PCI register offset: B2h
Register type: Read/Write
Default value: A0h
BIT NUM BER 7 6 5 4 3 2 1 0
RESET STATE 1 0 1 0 0 0 0 0
Table 4-31. Bit Descriptions – Serial Bus Slave Address Register
BIT FIELD NAME ACCESS DESCRIPTION
Serial bus slave address. This bit field represents the slave address for a read/write transaction
on the serial interface.
7:1 SLAVE_ADDR rw
This field is reset with PERST.
Read/Write command. This bit is used to determine whether the serial bus cycle is a read or a
write cycle.
0 – A single byte write is requested.
0 RW_CMD rw
1 – A single byte read is requested.
This field is reset with PERST.
4.2.58 Serial Bus Control and Status Register
The Serial Bus Control and Status register is used to control the behavior of the serial bus interface. This
register also provides status information about the state of the serial bus.
PCI register offset: B3h
Register type: Read/Write; Read Only; Clear by a Write of One; Hardware Update
Default value: 00h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0
Table 4-32. Bit Descriptions – Serial Bus Control and Status Register
BIT FIELD NAME ACCESS DESCRIPTION
Protocol select. This bit is used to select the serial bus address mode used.
0 – Slave address and byte address are sent on the serial bus.
7 PROT_SEL rw
1 – Only the slave address is sent on the serial bus.
This field is reset with PERST.
6 RSVD r Reserved. When read, this bit returns zero.
Requested serial bus access busy. This bit is set when a serial bus cycle is in progress.
0 – No serial bus cycle
5 REQBUSY ru
1 – Serial bus cycle in progress
This field is reset with PERST.
60 XIO3130 Configuration Register Space Copyright © 2007–2010, Texas Instruments Incorporated
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