Specifications

XIO3130

www.ti.com

SLLS693F–MAY 2007–REVISED JANUARY 2010

4.2.54 Link Status Register

The Link Status register indicates the current state of the PCI Express Link.

PCI register offset: A2h

Default value: 1X11h

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 1 0 x 0 0 0 0 0 1 0 0 0 1

Table 4-30. Bit Descriptions – Link Status Register

BIT FIELD NAME ACCESS DESCRIPTION

15:13 RSVD r Reserved. When read, these bits return zeros.

Slot clock configuration. This bit reflects the reference clock configurations and is read-only 1,

12 SCC r

indicating that a 100 MHz common clock reference is used.

11 LT r Link training in progress. This bit has no function for upstream ports and is read-only zero.

10 UNDEF r Undefined. The value read from this bit is undefined.

9:4 NLW r Negotiated link width. This field is read-only 000001b, which indicates that the lane width is x1.

3:0 LS r Link speed. This field is read-only 0001b, which indicates that the link speed is 2.5Gb/s.

4.2.55 Serial Bus Data Register

The Serial Bus Data register is used to read and write data on the serial bus interface, e.g., for use with a

serial EEPROM. When writing data to the serial bus, this register must be written before writing to the

Serial Bus Address register to initiate the cycle. When reading data from the serial bus, this register

contains the data read after the REQBUSY (bit 5 Serial Bus Control register) bit is cleared. This register is

reset with PERST.

PCI register offset: B0h

Default value: 00h

BIT NUMBER 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 0 0 0 0 0

4.2.56 Serial Bus Index Register

The value written to the Serial Bus Index register represents the byte address of the byte being read or

written from the serial bus device. The Serial Bus Index register must be written before initiating a serial

bus cycle by writing to the Serial Bus Slave Address register. This register is reset with PERST.

PCI register offset: B1h

Default value: 00h

BIT NUMBER 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 0 0 0 0 0

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