Specifications
XIO3130
www.ti.com
SLLS693F–MAY 2007–REVISED JANUARY 2010
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 1 1 0 1
4.2.43 Next-Item Pointer Register
The contents of this read-only register indicate the next item in the linked list of capabilities for the
XIO3130. This register reads 90h, which points to the PCI Express Capabilities registers.
PCI register offset: 81h
Register type: Read only
Default value: 90h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 1 0 0 1 0 0 0 0
4.2.44 Subsystem Vendor ID Register
This register, which is used for system and option card identification purposes, may be required for certain
operating systems. This read-only register is a direct reflection of the Subsystem Access register, which is
read/write and is initialized through the EEPROM (if present).
PCI register offset: 84h
Register type: Read only
Default value: 0000h
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4.2.45 Subsystem ID Register
This register, which is used for system and option card identification purposes, may be required for certain
operating systems. This read-only register is a direct reflection of the Subsystem Access register, which is
read/write and is initialized through the EEPROM (if present).
PCI register offset: 86h
Register type: Read only
Default value: 0000h
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4.2.46 PCI Express Capability ID Register
This read-only register identifies the linked list item as the register for PCI Express Capabilities. The
register returns 10h when read.
PCI register offset: 90h
Register type: Read only
Default value: 10h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 1 0 0 0 0
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