Specifications

XIO3130
SLLS693F–MAY 2007 –REVISED JANUARY 2010 www.ti.com
Table 2-10. GPIO Terminals
Signal Ball I/O Type External Parts Description
GPIO 0. If the DN1_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the PRSNT hotplug pin for downstream
GPIO0 C06 LV CMOS I/O
port 1. Otherwise this pin’s function is programmed with the GPIO A
Control register.
GPIO 1. If the DN1_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the POWERON hotplug pin for
GPIO1 B11 LV CMOS I/O
downstream port 1. Otherwise this pin’s function is programmed with
the GPIO A Control register.
GPIO 2. If the DN1_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the PWRGD hotplug pin for downstream
GPIO2 A12 LV CMOS I/O
port 1. Otherwise this pin’s function is programmed with the GPIO A
Control register
GPIO 3. This pin’s function is programmed with the GPIO A Control
GPIO3 C12 LV CMOS I/O
register.
GPIO 4. If the DN2_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the PRSNT hotplug pin for downstream
GPIO4 D14 LV CMOS I/O
port 2. Otherwise this pin’s function is programmed with the GPIO A
Control register.
GPIO 5. If the DN2_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the POWERON hotplug pin for
GPIO5 L12 LV CMOS I/O
downstream port 2. Otherwise this pin’s function is programmed with
the GPIO A Control register.
GPIO 6. If the DN2_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the PWRGD hotplug pin for downstream
GPIO6 M13 LV CMOS I/O
port 2. Otherwise this pin’s function is programmed with the GPIO A
Control register.
GPIO 7. This pin’s function is programmed with the GPIO A Control
GPIO7 P13 LV CMOS I/O
register.
GPIO 8. If the DN3_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the PRSNT hotplug pin for downstream
GPIO8 M10 LV CMOS I/O
port 3. Otherwise this pin’s function is programmed with the GPIO B
Control register.
GPIO 9. If the DN3_DPSTRP pin is pulled high at the de-assertion of
reset, this pin functions as the POWERON hotplug pin for
GPIO9 N03 LV CMOS I/O
downstream port 3. Otherwise this pin’s function is programmed with
the GPIO B Control register.
GPIO 10. If the DN3_DPSTRP pin is pulled high at the de-assertion
of reset, this pin functions as the PWRGD hotplug pin for
GPIO10 P02 LV CMOS I/O
downstream port 3. Otherwise this pin’s function is programmed with
the GPIO B Control register.
GPIO 11. This pin’s function is programmed with the GPIO B Control
GPIO11 N11 LV CMOS I/O
register.
GPIO 12. This pin’s function is programmed with the GPIO B Control
GPIO12 A14 LV CMOS I/O
register.
GPIO 13. This pin’s function is programmed with the GPIO B Control
GPIO13 B13 LV CMOS I/O
register.
GPIO 14. This pin’s function is programmed with the GPIO B Control
GPIO14 N12 LV CMOS I/O
register.
GPIO 15. This pin’s function is programmed with the GPIO B Control
GPIO15 M14 LV CMOS I/O
register.
GPIO16. This pin’s function is programmed with the GPIO C Control
GPIO16 P12 LV CMOS I/O
register.
GPIO 17. This pin’s function is programmed with the GPIO C Control
GPIO17 M03 LV CMOS I/O
register.
GPIO 18. This pin’s function is programmed with the GPIO C Control
GPIO18 L03 LV CMOS I/O
register.
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