Specifications

XIO3130
SLLS693F–MAY 2007 –REVISED JANUARY 2010 www.ti.com
5 PCI Hot Plug Implementation Overview
5.1 PCI Hot Plug Architecture Overview
The PCI Express architecture is designed to natively support both hot-add and hot-removal (collectively
Hot-Plug) of adapters. The architecture also provides a ‘toolbox’ of mechanisms that allow different
user/operator models to be supported using a self-consistent infrastructure. PCI Express defines the
registers necessary to support the integration of a PCI Hot Plug controller within individual root and switch
ports. Under PCI Hot-Plug software control, the PCI Hot-Plug controllers and the associated port interface
within the root or switch port must control the card interface signals to ensure orderly power-down and
power-up as cards are removed and replaced.
Table 5-1. GPIO Matrix
GPIO[#] 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
PRSNT1 S
PWRON1 S
PWRGD1 S
CLKREQ1 2
MRLSDET1 3 6 6 6 6
ACTLED1 2 2 2
PWRLED1 6 6 5 5
ATNLED1 4 4 5 2 2
ATNBTN1 2 2 2 2
PWRFLT1 4 4 4 4 4 4 5 5
EMILCTL1 2 2
EMILENG1 6 6
PRSNT2 S
PWRON2 S
PWRGD2 S
CLKREQ2 2
MRLSDET2 6 6 3 7 7
ACTLED2 3 3 3
PWRLED2 6 7 6 6
ATNLED2 4 5 6 3 3
ATNBTN2 2 2 3 3
PWRFLT2 4 4 4 5 5 5 6 6
EMILCTL2 2 3
EMILENG2 6 7
PRSNT3 S
PWRON3 S
PWRGD3 S
CLKREQ3 2
MRLSDET3 7 7 7 7 3
ACTLED3 4 4 4
PWRLED3 7 7 7 4
ATNLED3 5 5 7 4
ATNBTN3 3 3 3 3
PWRFLT3 5 5 5 5 5 5 7 7 7
EMILCTL3 3 3
128 PCI Hot Plug Implementation Overview Copyright © 2007–2010, Texas Instruments Incorporated
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