Specifications

XIO3130

www.ti.com

SLLS693F–MAY 2007–REVISED JANUARY 2010

XIO3130

Check for Samples: XIO3130

1 Features

• PCI Express Base Specification, Revision 1.1 • Support for D1, D2, D3hot, and D3cold

• PCI Express Card Electromechanical • Active State Power Management (ASPM) Using

Specification, Revision 1.1 Both L0s and L1

• PCI-to-PCI Bridge Architecture Specification, • Low-Power PCI Express Transmitter Mode

Revision 1.1

• Integrated AUX Power Switch Drains VAUX

• PCI Bus Power Management Interface Power Only When Main Power Is Off

Specification, Revision 1.2

• Integrated PCI Hot Plug Support

• PCI Express Fanout Switch With One ×1

• Integrated REFCLK Buffers for Switch

Upstream Port and Three ×1 Downstream Ports

Downstream Ports

• Packet Transmission Starts While Reception

• 3.3-V Multifunction I/O Pins for PCI Hot Plug

Still in Progress (Cut-Through)

Status and Control or General Purpose I/Os

• 256-Byte Maximum Data Payload Size

• Optional Serial EEPROM for System-Specific

• Peer-to-Peer Support Configuration Register Initialization

• Wake Event and Beacon Support

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2PCI Express, PCI Hot Plug are trademarks of others.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.