Specifications

Parameters/address space
4.2 Address space
DI 32x24VDC HF digital input module (6ES7521-1BL00-0AB0)
34 Manual, 04/2015, A5E03485935-AE
The following section shows the behavior of the STS_DQ bit with the parameter assignment
"Set output DQ = between low counting limit and comparison value".
The STS_DQ bit is set to 1
when the low counting limit < = counted value < = comparison value is reached.
As an option, a hardware interrupt can be enabled in the parameter assignment. This is
generated with the parameter rising edge of the STS_DQ bit.
The following figure shows an example of the behavior of the STS_DQ bit between the low
counting limit and comparison value.
Figure 4-12 Behavior of the STS_DQ bit and hardware interrupt
Counting limits
The counting limits define the range of values of the counted value used. The counting limits
can be set in the parameters and can be changed with the user program during runtime.
Settable high counting limit: 4294967295 (2
32
-1).
Low counting limit (not settable): 0
You can continue or terminate (automatic gate stop) counting if a counting limit is exceeded,
see the parameter "Behavior when a counting limit is exceeded".
Start value/load value
The start value is specified in the parameter assignment with STEP 7 (TIA Portal). The load
value can be changed by the user program. Both values must be between the low counting
limit and high counting limit.
Comparison values
You specify a comparison value per channel that can control the feedback bit STS_DQ
regardless of the user program. When the current counted value corresponds to the
comparison condition set in the parameters, the feedback bit STS_DQ is set. You can use
the feedback bit STS_DQ to control a digital output of a digital output module.
The comparison values can be set in the parameters and can be changed with the user
program during runtime.