Service manual

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8258I N/B Maintenance
8258I N/B Maintenance
1.2.8 Memory System
• JEDEC-standard 200-pin, small-outline, dual in-line memory module (SODIMM)
• VDD=+1.8 V±0.1 V, VDDQ=+1.8 V±0.1 V
• JEDEC standard 1.8 V I/O (SSTL_18-compatible)
• Differential data strobe (DQS,DQS#) option
• Four-bit prefetch architecture
• Differential clock input (CK, CK#)
• Command entered on each rising CK edge
• DQS edge-aligned with data for reads
• DQS center-aligned with data for writes
• Duplicate output strobe (RDQS) option for x8 configuration
• DLL to align DQ and DQS transitions with CK
• Four internal banks for concurrent operation
• Data Mask (DM) for masking write data
 128 MB, 256 MB, 512 MB, 1 GB (x64) 200-Pin DDR2 SDRAM SODIMMs
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