Datasheet

Register Description
92 Intel
®
82845G/82845GL/82845GV GMCH Datasheet
3.5.3 Integrated Graphics Device Registers (Device 2)
The Integrated Graphics Device registers are in Device 2. This section contains the PCI
configuration registers listed in order of ascending offset address. Table 3-5 provides the register
address map for this device.
Table 3-5. Integrated Graphics Device Register Address Map (Device2)
Address
Offset
Symbol Register Name
Default
Value
Access
00–01h VID2 Vendor Identification 8086h RO
02–03h DID2 Device Identification 2562h RO
04–05h PCICMD2 PCI Command 0000h RO, R/W
06–07h PCISTS2 PCI Status 0090h RO, R/WC
08h RID2 Revision Identification
see register
description
RO
09–0Bh CC Class Code 030000h RO
0Ch CLS Cache Line Size 00h RO
0Dh MLT2 Master Latency Timer 00h RO
0Eh HDR2 Header Type 00h RO
0Fh — Intel Reserved — —
10–13h GMADR Graphics Memory Range Address 00000008h R/W, RO
14–17h MMADR Memory Mapped Range Address 00000000h R/W, RO
18–2Bh — Intel Reserved — —
2C–2Dh SVID2 Subsystem Vendor ID 0000h R/WO
2E–2Fh SID2 Subsystem ID 0000h R/ WO
30–33h ROMADR Video Bids ROM Base Address 00000000h R/W, RO
34h CAPPOINT Capabilities Pointer D0h RO
35–3Bh — Intel Reserved — —
3Ch INTRLINE Interrupt Line 00h R/W
3Dh INTRPIN Interrupt Pin 01h RO
3Eh MINGNT Minimum Grant 00h RO
3Fh MAXLAT Maximum Latency 00h RO
40–CFh — Intel Reserved — —
D0–D1h PMCAPID Power Management Capabilities ID 0001h RO
D2–D3h PMCAP Power Management Capabilities 0021h RO
D4–D5h PMCS Power Management Control 0000h R/W, RO
D6–FFh — Intel Reserved — —