Datasheet

Intel
®
82845G/82845GL/82845GV GMCH Datasheet 35
Signal Description
2.6 Analog Display
Signal Name Type Description
HSYNC
O
3.3 V
GPIO
CRT Horizontal Synchronization: This signal is used as the horizontal sync
(polarity is programmable) or “sync interval”.
VSYNC
O
3.3 V
GPIO
CRT Vertical Synchronization: This signal is used as the vertical sync (polarity
is programmable).
RED
O
Analog
RED Analog Video Output: This signal is a CRT Analog video output from the
internal color palette DAC. The DAC is designed for a 37.5 Ω equivalent load on
each signal (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT load).
RED#
O
Analog
RED# Analog Output: This signal is a truly differential analog video output from
the internal color palette DAC. Refer to the Intel
®
Pentium
®
4 Processor in 478-
Pin Package and Intel
®
845G/845GL/845GV Chipset Platform Design Guide for
routing recommendations. This signal is used to provide noise immunity.
GREEN
O
Analog
GREEN Analog Video Output: This signal is a CRT Analog video output from
the internal color palette DAC. The DAC is designed for a 37.5 Ω equivalent
load on each signal (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT
load).
GREEN#
O
Analog
GREEN# Analog Output: This signal is a truly differential analog video output
from the internal color palette DAC. Refer to the Intel
®
Pentium
®
4 Processor in
478-Pin Package and Intel
®
845G/845GL/845GV Chipset Platform Design
Guide for routing recommendations. This signal is used to provide noise
immunity.
BLUE
O
Analog
BLUE Analog Video Output: This signal is a CRT Analog video output from
the internal color palette DAC. The DAC is designed for a 37.5 Ω equivalent
load on each signal (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT
load).
BLUE#
O
Analog
BLUE# Analog Output: This signal is a truly differential analog video output
from the internal color palette DAC. Refer to the Intel
®
Pentium
®
4 Processor in
478-Pin Package and Intel
®
845G/845GL/845GV Chipset Platform Design
Guide for routing recommendations. This signal is used to provide noise
immunity.
REFSET
I
Analog
Resistor Set: Set point resistor for the internal color palette DAC. A 137 Ω, 1%
resistor is required between REFSET and GND.
DDCA_CLK
I/O
3.3 V
GPIO
Analog DDC Clock: Clock signal for the I
2
C style interface that connects to
Analog CRT Display.
NOTE: This signal may need to be level shifted to 5 V.
DDCA_DATA
I/O
3.3 V
GPIO
Analog DDC Data: Data signal for the I
2
C style interface that connects to
Analog CRT Display.
NOTE: This signal may need to be level shifted to 5 V.