User`s manual

SUPPORT INFORMATION
4-12 MPC505EVBUM/D
Table 4-9. Logic Analyzer Connector POD1 Pin Assignments
Pin Mnemonic Signal
1, 2 NC Not Connected
3 TS* TRANSFER START – An active-low output signal that indicates the
start of a bus cycle.
4 FOE* FLASH OUTPUT ENABLE - Active low output signal that lets you read
the EVB on-board flash memory.
5 – 9 CS1* – CS5* CHIP SELECT (1 – 5) – Output signals that select peripheral/memory
devices at programmed addresses.
10 – 13 BSWE0* –
BSWE3*
Address signal A6 - A9 - one signal of the three-state output address
bus.
14 – 19 A10 – A15 ADDRESS BUS (bits 10 15) – 6-pins of the three-state output address
bus.
20 GND GROUND
Table 4-10. Logic Analyzer Connector POD2 Pin Assignments
Pin Mnemonic Signal
1 – 3 NC Not Connected
4 – 17 A16 – A29 ADDRESS BUS (bits 16 29) – 14-pins of the three-state output address
bus.
18 – 20 GND GROUND
Table 4-11. Logic Analyzer Connector POD3 Pin Assignments
Pin Mnemonic Signal
1 – 3 NC Not Connected
4 – 19 D16 – D31 DATA BUS (bits 16 31) – Bi-directional data pins.
20 GND GROUND