Specifications
HARDWARE PREPARATION AND INSTALLATION
2-14 MPC505EVBUM/D
Table 2-7. Data Bus Reset Configuration Word (continued)
Data
Bus
Bit
Configuration
Function
Effected
Effect of
Mode Select = 1
During Reset
Effect of
Mode Select = 0
During Reset
EVB
Default
Mode
24 LEN L-bus Memory modules
are enabled.
L-bus Memory modules are
disabled and emulated
externally.
1
25 PRUMODE Forces accesses to Ports
A, B, I, J, K, and L to go
external.
No effect 0
26 ADDR[12:15] ADDR[12:15] PB[4:7] 1
27 Reserved 0
28 Reserved 0
29 Reserved 0
30 Test Slave Mode Enable Test Slave Mode
Disabled
Test Slave Mode Enabled 1
31 Test Transparent Mode
Enable
Test Transparent Mode
Disabled
Test Transparent Mode
Enabled
1
HARDWARE PREPARATION AND INSTALLATION
MPC505EVBUM/D 2-11
2.2.10.1 Chip Select Dip Switch (DS1)
The MPC505 MCU uses several chip selects on-board to control EVB functionality (memory and
peripheral devices). You can redefine these chip selects to control external devices via the
expansion connectors. To avoid conflicts between on-board and external devices, disable the
appropriate chip select by setting the appropriate DS1 switch (see Table 2-6).
Table 2-6. Chip Select Dip Switch (DS1)
Pin Chip Select Device Connected to Chip Select
1 CSBOOT Flash chip select (U24, U25, U27, U28)
2 FOE Flash output enable (U24, U25, U27, U28)
3 CS1 Burst RAM Bank1 (U19, U29)
4 CS2 Burst RAM Bank2 (U20, U30)
5 CS3 Burst RAM Bank3 (U21, U31)
6 CS4 Burst RAM Bank4 (U22, U32)
7 CS5 SCSI DUART (U4)
8 — UNUSED
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...