User`s manual

Minimal PowerPC 603e Evaluation Board

MOTOROLA

Part 5 Using the Expansion Connector

Excimer provides a very limited expansion capability for input/output . The Berg connector on the board is

an expansion connector that pins out the processor or FPGA signals shown in Table 1. See the Excimer

schematics or the Minimal PowerPC System application note to understand this interface.

Part 6 Frequency Control

Motorola reserves the right to ship several different frequencies of PowerPC 603e processor on the Excimer

board (Excimer often utilizes excess inventory). Consult the PowerPC 603e Hardware SpeciÞcation on our

Table 3: DINK Memory Map

Use Start End

.text (program code) 0x00000000 0x00002bcb

.data 0x00024bd0 0x0003c192

.bss 0x0003c194 0x00041f1b

Stack 0x000f1f20 0x0005fffff

Reserved memory for DINK 0x00060000 0x0006fffff

Memory for User programs 0x00070000 0x000ffffff

Table 4: Expansion Connector

Pin Signal Name Function

1, 2, 3 Vcc 3.3 Power

4, 6, 8, 10, 12, 12, 14, 16, 18 XD(0), XD(1), XD(2), XD(3), XD(4), XD(5), XD(6), XD(7) Buffered Data

Bus

5, 7, 9 Vcc 5.0 Power

11, 13, 15, 17 A(25), A(26), A(27), A(28) Address Lines

19, 21, 23 NC No Connect

20, 22, 24, 26, 28, 30, 32, 34 XF(0), XF(1), XF(2), XF(3), XF(4), XF(5), XF(6), XF(7) Unused Pins of

FPGA

36, 37, 38, 40 GND Ground

39 XCLK 66MHz Bus Clock

25 IRQ3* Interrupt 3

27 IRQ2* Interrupt 2

29 RESET* Reset

31 XOE* ROE Output Enable

33 XCS1* 0x8000000 0xBFFFFFF Chip Enable

35 BWE* Byte Write Enable