Specifications

32 A Minimal PowerPCª Boot Sequence for
Executing Compiled C Programs
Source Files
#define dbat3u 542
#define dbat3l 543
#define pvr 287
#define l2cr 1017
/* general BAT defines for bit settings to compose BAT regs */
/* represent all the different block lengths */
/* The BL field is part of the Upper Bat Register */
#define BAT_BL_128K 0x00000000
#define BAT_BL_256K 0x00000004
#define BAT_BL_512K 0x0000000C
#define BAT_BL_1M 0x0000001C
#define BAT_BL_2M 0x0000003C
#define BAT_BL_4M 0x0000007C
#define BAT_BL_8M 0x000000FC
#define BAT_BL_16M 0x000001FC
#define BAT_BL_32M 0x000003FC
#define BAT_BL_64M 0x000007FC
#define BAT_BL_128M 0x00000FFC
#define BAT_BL_256M 0x00001FFC
/* supervisor/user valid mode definitions - Upper BAT*/
#define BAT_VALID_SUPERVISOR 0x00000002
#define BAT_VALID_USER 0x00000001
#define BAT_INVALID 0x00000000
/* WIMG bit settings - Lower BAT */
#define BAT_WRITE_THROUGH 0x00000040
#define BAT_CACHE_INHIBITED 0x00000020
#define BAT_COHERENT 0x00000010
#define BAT_GUARDED 0x00000008
/* Protection bits - Lower BAT */
#define BAT_NO_ACCESS 0x00000000
#define BAT_READ_ONLY 0x00000001
#define BAT_READ_WRITE 0x00000002
/* Bit defines for the L2CR register */
#define L2CR_L2E 0x80000000 /* bit 0 - enable */
#define L2CR_L2PE 0x40000000 /* bit 1 - data parity */
#define L2CR_L2SIZ_2M 0x00000000 /* bits 2-3 2 MB; MPC7400 ONLY! */
#define L2CR_L2SIZ_1M 0x30000000 /* bits 2-3 1MB */
#define L2CR_L2SIZ_HM 0x20000000 /* bits 2-3 512K */
#define L2CR_L2SIZ_QM 0x10000000 /* bits 2-3 256K; MPC750 ONLY */
#define L2CR_L2CLK_1 0x02000000 /* bits 4-6 Clock Ratio div 1 */
#define L2CR_L2CLK_1_5 0x04000000 /* bits 4-6 Clock Ratio div 1.5 */
#define L2CR_L2CLK_2 0x08000000 /* bits 4-6 Clock Ratio div 2 */
#define L2CR_L2CLK_2_5 0x0a000000 /* bits 4-6 Clock Ratio div 2.5 */
#define L2CR_L2CLK_3 0x0c000000 /* bits 4-6 Clock Ratio div 3 */
#define L2CR_L2RAM_BURST 0x01000000 /* bits 7-8 burst SRAM */
#define L2CR_DO 0x00400000 /* bit 9 Enable caching of instr. in L2 */