Specifications

28 A Minimal PowerPCª Boot Sequence for
Executing Compiled C Programs
Source Files
#ifdef MPC603e
rlwinm r6,r5,0,22,20
mtspr hid0,r6
#endif
blr
//-----------------------------------------------------------------------
// Function: invalidate_and_enable_L1_icache
//
// Flash invalidate and enable the L1 icache
//-----------------------------------------------------------------------
invalidate_and_enable_L1_icache:
mfspr r5,hid0
ori r5,r5,0x8800
isync
mtspr hid0,r5
#ifdef MPC603e
rlwinm r6,r5,0,21,19
mtspr hid0,r6
#endif
blr
//-----------------------------------------------------------------------
// Function: address_translation_on
//
// Enable address translation using the MMU
//-----------------------------------------------------------------------
address_translation_on:
mfmsr r5
ori r5,r5,0x0030
mtmsr r5
isync
blr
//-----------------------------------------------------------------------
// Function: error
//
// If an error occurs while weÕre copying from ROM to RAM, we have nowhere
// to go because thereÕs no OS support. Hang.
//-----------------------------------------------------------------------
error:
b error