Technical information
AN2216/D
Appendix A: Flash Memory Protection
MOTOROLA MC9S12DP256 Software Development Using Metrowerkâs Codewarrior 21
Figure 20. Flash Protection and Security Memory Locations
The FPHDIS and FPLDIS bits determine the protection state of the upper and
lower areas within each 64K block respectively. The erased state of these bits
allows erasure and programming of the two protected areas and renders the
state of the FPHS[1:0] and FPLS[1:0] bits immaterial. When either of these bits
is programmed, the FPHS[1:0] and FPLS[1:0] bits determine the size of the
upper and lower protected areas. The tables in Figure 21 summarize the
combinations of the FPHS[1:0] and FPLS[1:0] bits and the size of the protected
area selected by each.
Figure 21. Flash Protection Select Bits
Trying to program or erase any of the protected areas will result in a protection
violation error and bit PVIOL will be set in the Flash Status Register FSTAT.
NOTE: A mass or bulk erase of the full 64K byte block is only possible when the
FPLDIS and FPHDIS bits are in the erased state.
Address
$FF00 - $FF07
Description
Security Backdoor Comparison Key
Reserved
$FF08 - $FF09
$FF0A
$FF0B
$FF0C
$FF0E
$FF0D
$FF0F
Protection Byte For Flash Block 3
Protection Byte For Flash Block 2
Protection Byte For Flash Block 1
Protection Byte For Flash Block 0
Reserved
Security Byte
FPHS[1:0] Protected Size FPLS[1:0] Protected Size
0:0
0:1
1:0
1:1
0:0
0:1
1:0
1:1
2K
4K
8K
16K
512 Bytes
1K
2K
4K