User`s guide

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80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
MC68HC912B32
80 QFP
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
BKGD
RESET
GND
VDD
PP5
PP4
PW3 / PP3
PW2 / PP2
PW1/ PP1
PA2 / DATA10 / ADDR10
PA3 / DATA11 / ADDR11
PA4 / DATA12 / ADDR12
PA5 / DATA13 / ADDR13
PA6 / DATA14 / ADDR14
PA7 / DATA15 / ADDR15
PP6
PP7
ADDR0 / DATA0 / PB0
ADDR1 / DATA1 / PB1
ADDR2 / DATA2 / PB2
SMODN / TAGHI
/ BKGD
PAI / IOC7 / PT7
IOC6 / PT6
IOC5 / PT5
IOC4 / PT4
IOC3 / PT3
IOC2 / PT2
IOC1 / PT1
IOC0 / PT0
ADDR9 / DATA9 / PA1
XIRQ
/ PE0
IRQ/ PE1
R/W
/ PE2
LSTRB
/ TAGLO / PE3
XTAL
EXTAL
RESET
V
DDX
V
SSX
ECLK / PE4
MODA / IPIPE0 / PE5 MODB / IPIPE1 / PE6
DBE
/ PE7
ADDR7 / DATA7 / PB7
ADDR6 / DATA6 / PB6 ADDR5 / DATA5 / PB5 ADDR4 / DATA4 / PB4
ADDR3 / DATA3 / PB3
V
DD
V
SS
PW0/ PP0
V
SSA
V
DDA
PAD7 / AN7
PAD6 / AN6
PAD5 / AN5
PAD4 / AN4
PAD3 / AN3
PAD2 / AN2
PAD1 / AN1
PAD0 / AN0
V
RL
V
RH
V
SS
V
DD
PS0 / RxD PS1 / TxD PS2 PS3 PS4 / SDI/MISO PS5 / SDO/MOSI PS6 / SCK PS7 / CS
/SS
V
FP
PDLC6 PDLC5 PDLC4 PDLC3 PDLC2
PDLC1 / DLCTx
PDLC0 / DLCRx V
SSX
V
DDX
ADDR8 / DATA8 / PA0
Figure 3. In-Circuit wiring diagram for MC68HC912B32, 80-PIN QFP Package
©ETL 2004-2006 MC68HC912/9S12 Programmer User’s Guide 16