Technical data

3-36 Computer Group Literature Center Web Site
Test Descriptions
3
REG - Register Access
Command Input
PPCx-Diag>eide reg
Description
The REG test performs non-intrusive device access for initial address and
accessibility checks. Bit patterns of data written to and read from several
of the ATA Task File registers are compared with expected values.
Failures indicate addressing errors or data line corruption of data bits 0
through 7 only (D0-D7).
The BSY bit in the status register is first checked to verify that the device
registers are valid (provided a device is attached). If a time-out occurs
while waiting for a “ready” condition, the failure is logged and the test
continues.
The test walks both a '1' and a '0' through the modifiable Task File registers
and performs a sanity check on the feature/error register pair as well as the
control/alternate status register pair. Finally, the alternate status register is
compared to the status register.
This test is run in its entirety regardless of failures. All failures are reported
after the test is complete to aid analysis of failures.
Response/Messages
After the command has been issued, the following is displayed:
EIDE REG: EIDE Register Access Tests... Running --->
If all parts of the test are completed correctly, then the test passes:
EIDE REG: EIDE Register Access Tests... Running ---> PASSED
If any part of the test fails, then the following is displayed:
EIDE REG: EIDE Register Access Tests... Running ---> FAILED
EIDE/REG Test Failure Data:
(ERROR MESSAGE)