Technical data

RAM - Local RAM Tests

http://www.motorola.com/computer/literature 3-95

ADR - Memory Addressing

Command Input

PPCx-Diag>RAM ADR

Description

This is the memory addressability test, the purpose of which is to verify

addressing of memory in the range specified by the configuration

parameters for the RAM test group. Addressing errors are sought by using

a memory locations address as the data for that location. This test is coded

to use only 32-bit data entities. The test proceeds as follows:

1. A Locations Address is written to its location (n).

2. The next location (n+4) is written with its address complemented.

3. The next location (n+8) is written with the most significant (MS) 16

bits and least significant (LS) 16 bits of its address swapped with

each other.

4. Steps 1, 2, and 3 are repeated throughout the specified memory

range.

5. The memory is read and verified for the correct data pattern(s) and

any errors are reported.

6. The test is repeated using the same algorithm as above (steps 1

through 5) except that inverted data is used to insure that every data

bit is written and verified at both “0” and “1”.

Response/Messages

After the command has been issued, the following line is printed:

RAM ADR: Addressability.............. Running --->

If all parts of the test are completed correctly, then the test passes:

RAM ADR: Addressability.............Running ---> PASSED

If the test fails, then the display appears as follows: