Specifications

D
evice Driver Programming
6-4
Byte-Ordering and Alignment 6
The byte-ordering convention used in the PowerMAXION platform is Big Endian. In this
model, the most significant byte (MSB) always has the lowest address. This provides a
consistency of addressing which is independent of the word size of the machine. This is
shown in Figure 6-2. (Note that the depicted bit ordering (with bit 31 most significant) is
applicable to I/O addressing. The bit ordering of the PowerPC 604 is the opposite (with bit
0 most significant). Byte ordering for both I/O and the PowerPC 604 is the same.)
During I/O transfers, the system expects the addresses of all words to be even addresses—
that is, zero, two, four, six, eight, and so on. Similarly, the system expects that all long-
word addresses are divisible by four—that is zero, four, eight, twelve, and so on. Finally,
the system expects all double-longword addresses to be divisible by eight—that is, zero,
eight, sixteen, and so on.
NOTE
Attempting an I/O transfer using non-aligned data types in a
driver program causes a fatal exception error on any PowerMAX-
ION platform. In other words, alignment errors are not recover-
able in hardware.
Figure 6-2. Big Endian Bit and Byte Notation
VME Addressing 6
The main objective of this section is to help comprehend the characteristics of data trans-
fers on the VME bus. Understanding these characteristics aids in building device
addresses and understanding the error detection and recovery feature of the VMEbus.
LOW
ADDRESS
HIGHER
ADDRESS
LOW ADDRESS = MSB
MSB
LSB
7
0
15
16
23
24
31
0
0
7
8
7
8
15
MSB
LSB