Specifications

The PCI Environmen
t
3-
7
call must be used. The arguments must include the CPU physical address and the size of
the PCI BAR register returned from the “pci_XXXspc_alloc” call.
Use the “physmap_free” call to release the Kernel virtual address assignment associated
with a PCI BAR assignment.
Accessing PCI Device Registers and Memory Space
Though Kernel Virtual Maps
3
It is important to remember to use the byte swapping and pipeline flushing Macros pro-
vided when accessing PCI devices directly. These macros BUS_GETLR, BUS_GETSR,
BUS_GETBR and BUS_PUTLR, BUS_PUTSR, BUS_PUTBR include the necessary
byte swapping and FIFO flushing instructions to manipulate little endian PCI devices
using a PowerMax which is defaulted to big endian mode.
Determining PCI Memory Address of Particular System Memory
Location
3
To get a valid PCI memory address equivalent to a particular system memory location one
should use the “pci_vtop” call. This returns a PCI memory address that can be used by a
PCI bus master device.
The ‘pci_vtop” call does not lock down or establish any resource that requires releasing.
Therefore, the programmer must insure that each virtual page is locked down and non-
swapable.
Attaching and Releasing a PCI Interrupt Vector Assigned to a
PCI Slot/Function
3
The “adapter” structure entry for a PCI device/slot/function already contains the necessary
information about the Interrupt assignment. It is only necessary to register a handler entry
point or release the handler entry point from within the device driver.
The call to attach or release the interrupt handler entry point is “ivec_init” and “ivec_free”.
Both of these calls should use the “ivec” member of the “adapter” structure as the first
argument.
A special note, the PCI device must be fully initialized or have a disable mechanism estab-
lished to anticipate that handler attached, could be entered at any time, including immedi-
ately after being attached. This occurs because PCI interrupts are shared in nature and the
entry could be for another PCI device which shares the same vector.