Specifications

D
evice Driver Programming
A
-4
perror("PCIud - unable to alloc DIO Base address 0 (PCImite) ");
goto hot_swap_only;
}
/* map base address 1 */
if (pci_cfgspc_alloc(tag, PCI_BASE_ADDR1, &bar1) != 0) {
rc = errno;
perror("PCIud - unable to alloc DIO Base address 1 ");
goto hot_swap_only;
}
/* activate PCI IO and MEM decodes */
if (pci_cfg_cmd(tag, PCI_CMD_MEM , PCI_ENABLE) != 0) {
rc = errno;
perror("PCIud - unable to set cmd register ");
goto hot_swap_only;
}
/* Base Address 0 .. PCImite interface Asic */
/* get properly sized shm_id */
if ((bar0_shm_id =
shmget(IPC_PRIVATE, bar0.len, IPC_CREAT|SHM_NCACHE)) < 0) {
rc = errno;
bar1_shm_id = NULL;
perror("PCIud - unable to get shared memory map ");
goto error_exit;
}
/* bind phys address of PCI dev to shm_id */
if (shmbind(bar0_shm_id, bar0.cpu_addr) == -1) {
rc = errno;
perror("PCIud - unable to bind PCI base address 0 ");
goto error_exit;
}
/* map the PCI memory space into process */
/* virtual memory */
PCImite = (char *) shmat(bar0_shm_id, 0, 0);
if ((int) PCImite == -1) {
rc = errno;
dio_regs = NULL;
perror("PCIud - unable attach PCI base address 0 ");
goto error_exit;
}
/* special setup here for PCImite Asic */
BUS_PUTLR(PCImite + 0xc0, (bar1.pci_addr & 0xfffff000) | 0x80);
/* Base Address 1.. 82C55, 8253 and int cntrl */
/* get properly sized shm_id */
if ((bar1_shm_id =
shmget(IPC_PRIVATE, bar1.len, IPC_CREAT|SHM_NCACHE)) < 0) {
rc = errno;
bar1_shm_id = NULL;
perror("PCIud - unable to get shared memory map ");