Specifications

evice Driver Programming

8-6

Figure 8-2, “Big Endian Bit and Byte Notation” for more information. (Note that the

depicted bit ordering (with bit 31 most signiﬁcant) is applicable to I/O addressing. The bit

ordering of the Motorola MCP750 is the opposite (with bit 0 most signiﬁcant). Byte order-

ing for both I/O and the Motorola MCP750 is the same.)

Byte ordering on the PCI bus is little endian. The various bridge chips provide appropriate

translation from one ordering to the other for VME bus drivers. However, drivers written

for PCI devices must be aware of the difference and modify device addresses accordingly.

During I/O transfers, the system expects the addresses of all words even addresses— that

is, zero, two, four, six, eight, and so on. Similarly, the system expects that all longword

addresses are divisible by four—that is zero, four, eight, twelve, and so on. Finally, the

system expects all double-longword addresses to be divisible by eight—that is, zero, eight,

sixteen, etc.

NOTE

Attempting an I/O transfer using non-aligned data types in a

driver program causes a fatal exception error on Motorola

MCP750 platforms. In other words, alignment errors are not

recoverable in hardware.

Figure 8-2. Big Endian Bit and Byte Notation

LOW

ADDRESS

HIGHER

ADDRESS

LOW ADDRESS = MSB

MSB

LSB

MSB

LSB