Network Device User Guide

ManualsBrandsMotorola ManualsNetwork RouterMC9S12C-Family

Device User Guide — 9S12C128DGV1/D V01.05

5.3 Resets

Resets are a subset of the interrupts featured inTable 5-1. The different sources capable of generating a

system reset are summarized in Table 5-2. When a reset occurs, MCU registers and control bits are

$FFF6, $FFF7 SWI None None –

$FFF4, $FFF5 XIRQ X-Bit None –

$FFF2, $FFF3 IRQ I-Bit INTCR (IRQEN) $F2

$FFF0, $FFF1 Real Time Interrupt I-Bit CRGINT (RTIE) $F0

$FFEE, $FFEF Standard Timer channel 0 I-Bit TIE (C0I) $EE

$FFEC, $FFED Standard Timer channel 1 I-Bit TIE (C1I) $EC

$FFEA, $FFEB Standard Timer channel 2 I-Bit TIE (C2I) $EA

$FFE8, $FFE9 Standard Timer channel 3 I-Bit TIE (C3I) $E8

$FFE6, $FFE7 Standard Timer channel 4 I-Bit TIE (C4I) $E6

$FFE4, $FFE5 Standard Timer channel 5 I-Bit TIE (C5I) $E4

$FFE2, $FFE3 Standard Timer channel 6 I-Bit TIE (C6I) $E2

$FFE0, $FFE1 Standard Timer channel 7 I-Bit TIE (C7I) $E0

$FFDE, $FFDF Standard Timer overﬂow I-Bit TMSK2 (TOI) $DE

$FFDC, $FFDD Pulse accumulator A overﬂow I-Bit PACTL (PAOVI) $DC

$FFDA, $FFDB Pulse accumulator input edge I-Bit PACTL (PAI) $DA

$FFD8, $FFD9 SPI I-Bit SPICR1 (SPIE, SPTIE) $D8

$FFD6, $FFD7 SCI I-Bit

SCICR2

(TIE, TCIE, RIE, ILIE)

$D6

$FFD4, $FFD5

Reserved

$FFD2, $FFD3 ATD I-Bit ATDCTL2 (ASCIE) $D2

$FFD0, $FFD1

Reserved

$FFCE, $FFCF Port J I-Bit PIEP (PIEP7-6) $CE

$FFCC, $FFCD

Reserved

$FFCA, $FFCB

Reserved

$FFC8, $FFC9

Reserved

$FFC6, $FFC7 CRG PLL lock I-Bit PLLCR (LOCKIE) $C6

$FFC4, $FFC5 CRG Self Clock Mode I-Bit PLLCR (SCMIE) $C4

$FFBA to $FFC3

Reserved

$FFB8, $FFB9 FLASH I-Bit FCNFG (CCIE, CBEIE) $B8

$FFB6, $FFB7

CAN wake-up

I-Bit CANRIER (WUPIE) $B6

$FFB4, $FFB5

CAN errors

I-Bit CANRIER (CSCIE, OVRIE) $B4

$FFB2, $FFB3

CAN receive

I-Bit CANRIER (RXFIE) $B2

$FFB0, $FFB1

CAN transmit

I-Bit CANTIER (TXEIE[2:0]) $B0

$FF90 to $FFAF

Reserved

$FF8E, $FF8F Port P I-Bit PIEP (PIEP7-0) $8E

$FF8C, $FF8D PWM Emergency Shutdown I-Bit PWMSDN(PWMIE) $8C

$FF8A, $FF8B VREG LVI I-Bit CTRL0 (LVIE) $8A

$FF80 to $FF89

Reserved

NOTES:

1. Not available on MC9S12GC-Family members