MC68VZ328 Integrated Processor User's Manual

11-12 MC68VZ328 User’s Manual 
Programming Model
11.2.8 RTC Interrupt Enable Register
The RTC interrupt enable register (RTCIENR) is used to enable the interrupts in the RTCSIR if the
corresponding bit is set. The settings for the RTCIENR register are described in Table 11-10 on
page 11-13. For information about the frequency of the real-time interrupts, refer to Table 11-9.
MIN
Bit 1
Minute Flag—If enabled, this bit is set every
increment of the minute counter in the TOD
clock.
0 = No 1-minute interrupt occurred.
1 = A 1-minute interrupt has occurred.
SW
Bit 0
Stopwatch Flag—If enabled, the stopwatch
flag is set when the stopwatch minute count-
down times out.
0 = The stopwatch did not time out.
1 = The stopwatch timed out.
Table 11-9. Real-Time Interrupt Frequency Settings
Real-Time
Interrupt
Frequency
32.768 kHz
Reference Clock
38.4 kHz
Reference Clock
RFE7 512 Hz 1.9531 ms 600 Hz 1.6666 ms
RFE6 256 Hz 3.9062 ms 300 Hz 3.3333 ms
RFE5 128 Hz 7.8125 ms 150 Hz 6.6666 ms
RFE4 64 Hz 15.625 ms 75 Hz 13.3333 ms
RFE3 32 Hz 31.25 ms 37.5 Hz 26.6666 ms
RFE2 16 Hz 62.5 ms 18.75 Hz 53.3333 ms
RFE1 8 Hz 125 ms 9.375 Hz 106.6666 ms
RFE0 4 Hz 250 ms 4.6875 Hz 213.3333 ms
Table 11-8. RTC Interrupt Status Register Description (Continued)
Name Description Setting