MC68VZ328 Integrated Processor User's Manual

10-24 MC68VZ328 User’s Manual 
Programming Model
10.4.7 Port F Registers
Port F is composed of the following 8-bit general-purpose I/O registers:
• Port F direction register (PFDIR)
• Port F data register (PFDATA)
• Port F pull-up enable register (PFPUEN)
• Port F select register (PFSEL)
Each signal in the PFDATA register connects to an external pin. As on the other ports, each bit on Port F is
individually configured.
10.4.7.1 Port F Direction Register
The Port F direction register controls the direction (input or output) of the line associated with the
PFDATA bit position. When the data bit is assigned to a dedicated I/O function by the PFSEL register, the
DIR bits are ignored. The settings for the PFDIR bit positions are shown in Table 10-31.
PFDIR Port F Direction Register 0x(FF)FFF428
BIT 7654321BIT 0
DIR7 DIR6 DIR5 DIR4 DIR3 DIR2 DIR1 DIR0
TYPE rw rw rw rw rw rw rw rw
RESET
00000000
0x00
Table 10-31. Port F Direction Register Description
Name Description Setting
DIRx
Bits 7–0
Direction—These bits control the direction of the pins in an 8-bit
system. They reset to 0.
0 = Input
1 = Output