MC68VZ328 Integrated Processor User's Manual

7-6 MC68VZ328 User’s Manual 
DRAM Controller Operation
Table 7-4. 128 Mbit SDRAM—512 (16-Bit) and 1024 (8-Bit) Page Size
SDRAM
Pins
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BS0 A11 BS1
VZ Pins
A1/
MD
0
A2/
MD
1
A3/
MD
2
A4/
MD
3
A5/
MD
4
A6/
MD
5
A7/
MD
6
A8/
MD
7
A9/
MD
8
A10
/MD
9
A11
/MD
10
A12/
MD
11
A13
/MD
12
A15/
MD
14
Row
Address
Options
PA
11
PA
12
PA
13
PA
14
PA
15
PA
16
PA
17
PA
18
PA
20
PA
19
PA
21
PA22 PA
10
PA23
Column
Address
Options
(16-Bit)
PA
1
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PA
8
PA
9
X 0 PA22 X PA23
Column
Address
Options
(8-Bit)
PA
0
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PA
8
PA
9
PA
1
0 PA22 X PA23
Note: X = “don’t care”
Table 7-5. 256 Mbit SDRAM—512 (16-Bit) and 1024 (8-Bit) Page Size
SDRAM
Pins
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
BS
0
BS
1
VZ Pins
A1/
MD
0
A2/
MD
1
A3/
MD
2
A4/
MD
3
A5/
MD
4
A6/
MD
5
A7/
MD
6
A8/
MD
7
A9/
MD
8
A10
/MD
9
A11
/MD
10
A12
/MD
11
A13
/MD
12
A15
/MD
14
A16
/MD
15
Row
Address
Options
PA
11
PA
12
PA
13
PA
14
PA
15
PA
16
PA
17
PA
18
PA
20
PA
19
PA
21
PA
22
PA
10
PA
23
PA
24
Column
Address
Options
(16-Bit)
PA
1
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PA
8
PA
9
X0XXPA
23
PA
24
Column
Address
Options
(8-Bit)
PA
0
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PA
8
PA
9
PA
1
0XXPA
23
PA
24
Note: X = “don’t care”