MC68VZ328 Integrated Processor User's Manual

DRAM Controller Operation
 DRAM Controller 7-5
Table 7-2 through Table 7-5 on page 7-6 provide recommendations for MC68VZ328–to–SDRAM
connections and for selecting multiplexing options for different types of SDRAM.
Table 7-2. 16 Mbit SDRAM—256 (16-Bit) and 512 (8-Bit) Page Size
SDRAM
Pins
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 BS
VZ Pins
A1/
MD0
A2/
MD1
A3/
MD2
A4/
MD3
A5/
MD4
A6/
MD5
A7/
MD6
A8/
MD7
A9/
MD8
A10/
MD9
A11/
MD10
A12/
MD11
Row
Address
Options
PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA10 PA9 PA19 PA20
Column
Address
Options
(16-Bit)
PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 X X 0 PA20
Column
Address
Options
(8-Bit)
PA0 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA1 X 0 PA20
Note: X = “don’t care”
Table 7-3. 64 Mbit SDRAM—256 (16-Bit) and 512 (8-Bit) Page Size
SDRAM
Pins
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 BS0 BS1
VZ Pins
A1/
MD
0
A2/
MD
1
A3/
MD
2
A4/
MD
3
A5/
MD
4
A6/
MD
5
A7/
MD
6
A8/
MD
7
A9/
MD
8
A10
/MD
9
A11
/MD
10
A12
/MD
11
A13/
MD
12
A14/
MD
13
Row
Address
Options
PA
11
PA
12
PA
13
PA
14
PA
15
PA
16
PA
17
PA
18
PA
10
PA
9
PA
19
PA
20
PA21 PA22
Column
Address
Options
(16-Bit)
PA
1
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PA
8
X X 0 X PA21 PA22
Column
Address
Options
(8-Bit)
PA
0
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
PA
8
PA
1
X 0 X PA21 PA22
Note: X = “don’t care”