Specifications

Software Consideration

Once the hardware interface has been constructed, a few initialization routines need to be performed. Once these

initialization sequences are complete, the CPU can be programmed to implement any GPIB device.

System Configuration

System configuration must be performed before the TNT4882 can be used. Configuration of the system requires you

to initialize and configure the System Integration Module (SIM), the interrupt registers, and the DMA channel. Once

you have configured these modules, the MC68340-TNT4882 interface is fully functional.

System Integration Module Configuration

Configure the appropriate chip select registers in the SIM so that the TNT4882 can be selected. With the above setup,

256 bytes are required. Therefore, CSN2 registers are configured and the TNT4882 is located at $00FFE800 in

MC68340 address space. Table 4 shows the register map of the TNT4882 in MC68340 address space. As you can see,

every register in the TNT4882 can be accessed by four different addresses. This setup allows you to use longword

accesses from the FIFOs and gives you the choice of using either the upper byte lane or the lower byte lane.

Table 4.

DIR/CDOR $FFE800 - $FFE803

ISR1/IMR1 $FFE808 - $FFE80B

ISR2/IMR2 $FFE810 - $FFE813

ACCWR $FFE814 - $FFE817

SPSR/SPMR $FFE818 - $FFE81B

INTR $FFE81C - $FFE81F

ADSR/ADMR $FFE820 - $FFE823

CNT2 $FFE824 - $FFE827

CPTR/AUXMR $FFE828 - $FFE82B

CNT3 $FFE82C - $FFE82F

ADR0/ADR $FFE830 - $FFE833

HSSEL $FFE834 - $FFE837

ADR1/EOSR $FFE838 - $FFE83B

STS1/CFG $FFE840 - $FFE843

DSR/SH_CNT $FFE844 - $FFE847

IMR3 $FFE848 - $FFE84B

HIER $FFE84C - $FFE84F

CNT0 $FFE850 - $FFE853

MISC $FFE854 - $FFE857

CNT1 $FFE858 - $FFE85B

CSR/KEYREG $FFE85C - $FFE85F

FIFO B $FFE860 - $FFE863

FIFO A $FFE864 - $FFE867

ISR3/CCR $FFE868 - $FFE86B

SASR/DCR $FFE86C - $FFE86F

STS2/CMDR $FFE870 - $FFE873

ISR0/IMR0 $FFE874 - $FFE877

TIMER $FFE878 - $FFE87B

BSR/BCR $FFE87C - $FFE87F