Specifications

20
#define MR2A *(unsigned char *) (MCBASE + 0x720)
#define MR1B *(unsigned char *) (MCBASE + 0x718)
#define SRB *(unsigned char *) (MCBASE + 0x719)
#define CSRB *(unsigned char *) (MCBASE + 0x719)
#define CRB *(unsigned char *) (MCBASE + 0x71A)
#define RBB *(unsigned char *) (MCBASE + 0x71B)
#define TBB *(unsigned char *) (MCBASE + 0x71B)
#define MR2B *(unsigned char *) (MCBASE + 0x721)
#define IPCR *(unsigned char *) (MCBASE + 0x714)
#define ACR *(unsigned char *) (MCBASE + 0x714)
#define ISR *(unsigned char *) (MCBASE + 0x715)
#define IER *(unsigned char *) (MCBASE + 0x715)
#define IP *(unsigned char *) (MCBASE + 0x71D)
#define OPCR *(unsigned char *) (MCBASE + 0x71D)
#define OPS *(unsigned char *) (MCBASE + 0x71E)
#define OPR *(unsigned char *) (MCBASE + 0x71F)
/***************************************************************************/
/******************************Timer Modules********************************/
#define TMMCR1 *(unsigned short int *) (MCBASE + 0x600)
#define IR1 *(unsigned short int *) (MCBASE + 0x604)
#define CR1 *(unsigned short int *) (MCBASE + 0x606)
#define SR1 *(unsigned short int *) (MCBASE + 0x608)
#define CNTR1 *(unsigned short int *) (MCBASE + 0x60A)
#define PREL1T1 *(unsigned short int *) (MCBASE + 0x60C)
#define PREL2T1 *(unsigned short int *) (MCBASE + 0x60E)
#define COM1 *(unsigned short int *) (MCBASE + 0x610)
#define TMMCR2 *(unsigned short int *) (MCBASE + 0x640)
#define IR2 *(unsigned short int *) (MCBASE + 0x644)
#define CR2 *(unsigned short int *) (MCBASE + 0x646)
#define SR2 *(unsigned short int *) (MCBASE + 0x648)
#define CNTR2 *(unsigned short int *) (MCBASE + 0x64A)
#define PREL1T2 *(unsigned short int *) (MCBASE + 0x64C)
#define PREL2T2 *(unsigned short int *) (MCBASE + 0x64E)
#define COM2 *(unsigned short int *) (MCBASE + 0x650)
/***************************************************************************/
#endif










