User`s guide

Table 6 (Cont.)
MC68306 Signal List
POD PIN LA BIT PGA PIN QFP PIN 68306 LABEL BUS LABEL ALT BUS SIG LABEL
P7
3
190F235~LDS ~LDS_T
P7
3
18 1 F1 36 ~UDS ~UDS_T
P7
4
17 2 N/C
P7
4
16 3 N/C
P7 15 4 J11 111 IP0 SERIAL IP0
P7 14 5 K12 113 IP1 SERIAL IP1
P7 13 6 G10 104 IP2 SERIAL IP2
P7 12 7 L11 114 OP0 SERIAL OP0
P7 11 8 L12 115 OP1 SERIAL OP1
P7 10 9 H11 105 OP3 SERIAL OP3
P7 9 10 J10 110 TXDB SERIAL TXDB
P7 8 11 J12 109 RXDB SERIAL RXDB
P7 7 12 H10 108 TXDA SERIAL TXDA
P7 6 13 H9 107 RXDA SERIAL RXDA
P7 5 14 G12 102 X1 SERIAL X1
P7 4 15 G9 103 X2 SERIAL X2
P7 3 Clock 1 N/C
Notation:
~ Signal is active low.
3. This is an undelayed version of the signal for timing analysis.
4. "No Connect." Signal is not passed through to the logic analyzer.
Preprocessor Interface Hardware Reference
Signal-to-Connector Mapping
MC68306 Preprocessor 3–13