Technical information

AN2317/D
12 Low-Cost Programming and Debugging Options for M68HC08 MCUs
V
TST
Generation The MAX232 shown in Figure 4 and Figure 5 can be used to supply the high
voltage (V
TST
) for monitor mode entry. The V+ output of the MAX232 supplies
about 9 V for the RS232 communications interface, which is adequate for
monitor mode entry. A zener diode and current limiting resistor complete the
V
TST
supply. The IRQ pin draws about 200 µA from the V
TST
supply when
monitor mode is selected.
Another way to get the V
TST
voltage is by switching a 9 V battery or power
supply to the IRQ
pin. An example of a switching circuit is shown in Figure 7
below. The supply voltage should be limited to 9 V to meet the V
TST
spec. The
1kΩ series resistor (R9) is a simple current limit for the V
TST
supply.
Low-Cost MON08
Interface
Figure 7 shows another implementation of a custom MON08 interface. This
circuit was modified from a low-cost RS232 interface found on several Internet
sites. The central part of the circuit, composed of transistors Q1 and Q2, diode
D1, capacitor C1, and resistors R1 – R5, is a simple level shifter between the
0 V and 5 V levels on the PTA0 pin and the –8 V to +8 V levels from the PC’s
serial port. This circuit actually transmits –5 V to +5 V levels due to the negative
pull down at C1 and V
DD
pullup at Q1. Q1 and Q2 can be any general-purpose
PNP and NPN transistors, respectively. Resistor R3 can be trimmed to provide
the best negative voltage swing for the transmitter signal at the DB9’s pin 2.
The top part of the circuit, composed of transistors Q3 and Q4, resistors R6 –
R9, and the 9 V battery or supply, is a simple way to switch the high V
TST
voltage to the IRQ
pin only when power is applied from the target’s V
DD
supply.
The V
TST
level cannot remain on the IRQ pin when the part is powered down,
but it must be present when the Reset
pin is released. Switch S1 is inserted for
the case where the PTA0 pin is used for serial communication in the normal
application (if an asynchronous serial communications interface (SCI) is not
available on the MCU). Again, Q3 and Q4 can be any purpose PNP and NPN
transistors, respectively.
The bottom part of the circuit in Figure 7 is an optional way to route the
appropriate levels for monitor mode selection to a target system that requires
the external bias.
A socket for a canned oscillator is included. This configuration allows either a
standard 14-pin footprint or a smaller 8-pin footprint.
Freescale Semiconductor, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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