User`s manual

Engineering Bulletin
Erasing the FLASH Array
EB183 — Rev. 1.0
MOTOROLA 7
Erasing the FLASH Array
This code segment follows the recommended procedure for erasing the
FLASH array. Following the code is a flowchart which outlines this same
procedure. The general idea is to apply the erase voltage to the FLASH
module within the chip (by setting the ENPE bit), set the erase flag, write
to any location in the array, then check to make sure the entire array is
erased. If the whole array is erased, then the number of times the erase
voltage was applied to get this erasure will have been preserved in the
Nep variable. The erase voltage is then pulsed that many times again to
ensure that the array remains erased. This is 100% erase margin.
NOTE: In the following code, the STEP labels refer to Section 7.7 of the
MC68HC912B32 Technical Summary (Motorola order number
MC68HC912B32TS/D).
;--------------------------------------------------------
;--- FLASH EEPROM erase routine ---
;--- ---
;--- Rev. 1.0 April 16,1998 ---
;--- Changed to 100ms delay for tepulse ---
;--- Written November 6, 1997 ---
;--- ---
;--------------------------------------------------------
;---- Equates -----------------------
FEELCK EQU $F4
FEEMCR EQU $F5
FEECTL EQU $F7
FEESTART EQU $8000 ;FLASH Start address
FEEEND EQU $FFFF ;FLASH End address
MAXNep EQU !5 ;5 pulses maximum
;---- Equates -----------------------
ORG $0900
Nep DS 1 ;Number of programming pulses applied
MARGINF DS 1 ;Programming margin flag
ERASED DS 1 ;Array Erased Flag
ORG $90A
START LDS #$B00 ;(Turn on Vfp supply to board here)
LDX #$0000
CLR Nep ;Clear number of pulses
CLR MARGINF ;Clear margin flag
CLR ERASED ;Clear erased flag