User`s manual

Engineering Bulletin
FLASH EEPROM Control Block
EB183 — Rev. 1.0
MOTOROLA 3
FLASH EEPROM
Module
Configuration
Register
The FEEMCR register (located at $00F5) contains only the BOOTP bit
(bit 0), which protects the 2-Kbyte boot block (1 Kbyte in early mask sets
G86W or G75R) located at $7800–$7FFF or $F800–$FFFF, depending
on the mapped location of the FLASH array at power-up. This bit must
be cleared, after the FEELCK (LOCK bit) is cleared, in order to write or
erase the boot block.
FLASH EEPROM
Module Test
Register
The FEETST register (located at $00F6) has no effect and always reads
0 in normal modes of operation.
Address: $00F5
Bit 7 654321Bit 0
Read:
0000000BOOTP
Write:
Reset:
00000001
Figure 2. FLASH EEPROM Module Configuration Register (FEEMCR)
Address: $00F6
Bit 7 654321Bit 0
Read:
00000000
Write:
Reset:
00000000
Figure 3. FLASH EEPROM Module Test Register (FEETST)