Technical data

MOTOROLA MC68HC912B32
92 MC68HC912B32TS/D
Figure 22 SPI Clock Format 0 (CPHA = 0)
Figure 23 SPI Clock Format 1 (CPHA = 1)
t
L
Begin End
SCK (CPOL=0)
SAMPLE I
CHANGE O
SEL SS (O)
Transfer
SCK (CPOL=1)
MSB first (LSBF=0) :
LSB first (LSBF=1) :
MSB
LSB
LSB
MSB
Bit 5
Bit 2
Bit 6
Bit 1
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
Bit 1
Bit 6
CHANGE O
SEL SS (I)
(MOSI pin)
(MISO pin)
(Master only)
(MOSI/MISO)
t
T
for t
T
, t
l
, t
L
Minimum 1/2 SCK
t
I
t
L
HC12 SPI CLOCK FORM 0
t
L
t
T
for t
T
, t
l
, t
L
Minimum 1/2 SCK
t
I
t
L
Begin End
SCK (CPOL=0)
SAMPLE I
CHANGE O
SEL SS (O)
Transfer
SCK (CPOL=1)
MSB first (LSBF=0) :
LSB first (LSBF=1) :
MSB
LSB
LSB
MSB
Bit 5
Bit 2
Bit 6
Bit 1
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
Bit 1
Bit 6
CHANGE O
SEL SS (I)
(MOSI pin)
(MISO pin)
(Master only)
(MOSI/MISO)
HC12 SPI CLOCK FORM 1