Technical data

MC68HC912B32 MOTOROLA
MC68HC912B32TS/D 85
13.2.2 SCI Baud Rate Generation
The basis of the SCI baud rate generator is a 13-bit modulus counter. This counter gives the generator
the flexibility necessary to achieve a reasonable level of independence from the CPU operating frequen-
cy and still be able to produce standard baud rates with a minimal amount of error. The clock source for
the generator comes from the P Clock.
13.2.3 Register Descriptions
Control and data registers for the SCI subsystem are described below. The memory address indicated
for each register is the default address that is in use after reset. The entire 512-byte register block can
be mapped to any 2-Kbyte boundary within the standard 64-Kbyte address space.
SC0BDH and SC0BDL are considered together as a 16-bit baud rate control register.
Read any time. Write SBR[12:0] anytime. Low order byte must be written for change to take effect. Write
SBR[15:13] only in special modes. The value in SBR[12:0] determines the baud rate of the SCI. The
desired baud rate is determined by the following formula:
which is equivalent to:
BR is the value written to bits SBR[12:0] to establish baud rate.
NOTE
The baud rate generator is disabled until the TE or RE bit in SC0CR2 register is set
for the first time after reset, and/or the baud rate generator is disabled when
SBR[12:0] = 0.
Table 28 Baud Rate Generation
Desired
SCI Baud Rate
BR Divisor for
P = 4.0 MHz
BR Divisor for
P = 8.0 MHz
110 2273 4545
300 833 1667
600 417 833
1200 208 417
2400 104 208
4800 52 104
9600 26 52
14400 17 35
19200 13 26
38400 — 13
SC0BDH — SCI Baud Rate Control Register $00C0
Bit 7 6 5 4 3 2 1 Bit 0
BTST BSPL BRLD SBR12 SBR11 SBR10 SBR9 SBR8 High
RESET: 0 0 0 0 0 0 0 0
SC0BDL — SCI Baud Rate Control Register $00C1
Bit 7 6 5 4 3 2 1 Bit 0
SBR7 SBR6 SBR5 SBR4 SBR3 SBR2 SBR1 SBR0 Low
RESET: 0 0 0 0 0 1 0 0
SCI Baud Rate
MCLK
16 BR×
---------------------=
BR
MCLK
16 SCI Baud Rate×
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