Technical data

MC68HC912B32 MOTOROLA
MC68HC912B32TS/D 61
Figure 12 Clock Chain for SCI, BDLC, RTI, COP
PCLK
SC0BD
MODULUS DIVIDER:
÷ 1, 2, 3, 4, 5, 6, ..., 8190, 8191
SCI0
RECEIVE
BAUD RATE ((16x)
SCI0
TRANSMIT
BAUD RATE (1x)
BITS: RTR2, RTR1, RTR0
TO RTI
BITS: CR2, CR1, CR0
TO COP
÷ 2
4
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
÷ 2
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
÷ 4
÷ 4
÷ 4
÷ 2
÷ 4
÷ 2
REGISTER: COPCTLREGISTER: RTICTL
HC912B32 CLOCK CHAIN SCI BDLC RTI COP
÷ 2
11
÷ 2
2
BIT: RTBYP
REGISTER: RTICTL
0:0
0:1
1:0
1:1
÷ 2
÷ 2
÷ 2
BITS: R1, R0
REGISTER: BCR1
TO BDLC