Technical data

MC68HC912B32 MOTOROLA
MC68HC912B32TS/D 5
1.3 MC68HC912B32 Block Diagram
Figure 1 MC68HC912B32 Block Diagram
IOC0
IOC1
IOC2
IOC3
IOC4
IOC5
IOC6
PAI
OC7
DDRT
PORT T
PERIODIC INTERRUPT
COP WATCHDOG
32-KBYTE FLASH EEPROM
1-KBYTE RAM
PORT E
TIMER AND
PT0
PT1
PT2
PT3
PT4
PT5
PT6
PT7
SPI
DDRS
PORT S
ATD
PORT AD
PE1
PE2
PE4
PE5
PE6
PE3
PAD3
PAD4
PAD5
PAD6
PAD7
V
DDA
V
SSA
V
RH
V
RL
PAD0
PAD1
PAD2
DDRA
PORT A
DDRB
PORT B
PA4 PA3 PA2 PA1 PA0 PA7 PA6 PA5
PB4 PB3 PB2 PB1 PB0 PB7 PB6 PB5
DATA15
MULTIPLEXED ADDRESS/DATA BUS
RESET
EXTAL
XTAL
PW0
PW1
PW2
PW3
PWM
DDRP
PORT P
PP0
PP1
PP2
PP3
V
DD
× 2
V
SS
× 2
SCI
RxD
TxD
I/O
I/O
SDI/MISO
SDO/MOSI
SCK
CS/SS
PS0
PS1
PS2
PS3
PS4
PS5
PS6
PS7
768-BYTE EEPROM
CLOCK MONITOR
PE0
PE7
AN3
AN4
AN5
AN6
AN7
V
DDA
V
SSA
V
RH
V
RL
AN0
AN1
AN2
SINGLE-WIRE
BACKGROUND
DEBUG MODULE
SMODN / TAGHI
ECLK
R/W
LSTRB / TAGLO
IPIPE0 / MODA
IPIPE1 / MODB
XIRQ
DBE
PULSE
ACCUMULATOR
LITE
IRQ/V
PP
PP4
PP5
PP6
PP7
I/O
I/O
I/O
I/O
I/O
I/O
DLCTx
DLCRx
I/O
BDLC
DDRDLC
PORT DLC
PDLC4
PDLC5
PDLC6
I/O
I/O
I/O
I/O
PDLC0
PDLC1
PDLC2
PDLC3
INTEGRATION
MODULE
(LIM)
V
FP
BREAK POINTS
CPU12
ADDR15
ADDR14
ADDR13
ADDR12
ADDR11
ADDR10
ADDR9
ADDR8
DATA14 DATA13 DATA12 DATA11 DATA10
DATA9 DATA8
ADDR7
ADDR6
ADDR5
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0
I/O
CONVERTER
V
SSX
× 2
V
DDX
× 2
POWER FOR
POWER FOR
I/O DRIVERS
INTERNAL
CIRCUITRY
DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0
NARROW BUS
WIDE
BUS
BKGD