Technical data

MOTOROLA MC68HC912B32
44 MC68HC912B32TS/D
7.7 Erasing the Flash EEPROM
The following sequence demonstrates the recommended procedure for erasing the Flash EEPROM.
The V
FP
pin voltage must be at the proper level prior to executing step 4 the first time.
1. Turn on V
FP
(apply program/erase voltage to the V
FP
pin).
2. Set the LAT bit and ERAS bit to configure the Flash EEPROM for erasing.
3. Write to any valid address in the Flash array. This allows the erase voltage to be turned on; the
data written and the address written are not important. The boot block will be erased only if the
control bit BOOTP is negated.
4. Apply erase voltage by setting ENPE.
5. Delay for a single erase pulse (t
EPULSE
).
6. Remove erase voltage by clearing ENPE.
7. Delay while high voltage is turning off (t
VERASE
).
8. Read the entire array to ensure that the Flash EEPROM is erased.
• If all of the Flash EEPROM locations are not erased, repeat steps 4 through 7 until either the
remaining locations are erased, or until the maximum erase pulses have been applied (n
EP
)
• If all of the Flash EEPROM locations are erased, repeat the same number of pulses as re-
quired to erase the array. This provides 100% erase margin.
9. Read the entire array to ensure that the Flash EEPROM is erased.
10. Clear LAT.
11. Turn off V
FP
(reduce voltage on V
FP
pin to V
DD
).
The flowchart in Figure 8 demonstrates the recommended erase sequence.