M68CPU32BUG/D REV 1 May 1995 M68CPU32BUG DEBUG MONITOR USER’S MANUAL M68CPU32BUG/D © MOTOROLA, INC.
Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
TABLE OF CONTENTS TABLE OF CONTENTS CHAPTER 1 GENERAL INFORMATION 1.1 Introduction......................................................................................................................... 1-1 1.2 General Description ............................................................................................................ 1-1 1.3 Using This Manual ............................................................................................................. 1-3 1.
TABLE OF CONTENTS CHAPTER 3 DEBUG MONITOR COMMANDS (continued) 3.8 Data Conversion (DC) ...................................................................................................... 3-15 3.9 Dump S-Records (DU) ..................................................................................................... 3-16 3.10 Go Direct (GD) ................................................................................................................. 3-19 3.11 Go To Next Instruction (GN).............
TABLE OF CONTENTS CHAPTER 4 ASSEMBLER/DISASSEMBLER (continued) 4.2.1.3 Disassembled Source Line .............................................................................. 4-4 4.2.1.4 Mnemonics and Delimiters ............................................................................. 4-5 4.2.1.5 Character Set ................................................................................................... 4-6 4.2.2 Addressing Modes.....................................................................
TABLE OF CONTENTS CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE 6.1 6.2 Introduction......................................................................................................................... 6-1 Diagnostic Monitor............................................................................................................. 6-1 6.2.1 Monitor Start-Up ...................................................................................................... 6-1 6.2.2 Command Entry and Directories.............
TABLE OF CONTENTS APPENDIX A S-RECORD INFORMATION A.1 A.2 A.3 A.4 Introduction.........................................................................................................................A-1 S-Record Content................................................................................................................A-1 S-Record Types...................................................................................................................A-2 S-Records Creation........................
TABLE OF CONTENTS LIST OF FIGURES FIGURES PAGE 1-1. CPU32Bug Operation Mode Flow Diagram ...................................................................... 1-2 1-2. BCC Memory Map ............................................................................................................. 1-6 LIST OF TABLES TABLES 2-1. 2-2. 3-1. 4-1. 5-1. 6-1. 6-2. B-1. C-1. C-2. C-3. C-4. C-5. C-6. PAGE Debugger Address Parameter Format..............................................................................
GENERAL INFORMATION CHAPTER 1 GENERAL INFORMATION 1.1 INTRODUCTION This chapter provides a general description, installation instructions, start-up and system restart instructions, memory requirements, and a terminal input/output (I/O) control description for the M68CPU32BUG Debug Monitor (hereafter referred to as CPU32Bug). Information in this manual covers the 1.00 version of the CPU32Bug. 1.
GENERAL INFORMATION MAIN POWER-UP/RESET DISPLAY BUG PROMPT WAIT FOR INPUT NO WARM START? YES DOES COMMAND CAUSE TARGET CODE EXECUTION SET DEBUGGER DIRECTORY NO YES RESTORE TARGET STATE EXECUTE COMMAND DISPLAY DEBUGGER NAME AND VERSION TARGET CODE GO TO MAIN INITILIZE BUG VARIBLES DISPLAY WARM START MESSAGE RUN SYSTEM CONFIDENCE TEST EXECPTION EXCEPTION HANDLERS SET DEBUGGER DIRECTORY SAVE TARGET STATE DISPLAY DEBUGGER NAME & VERSION DISPLAY RESULTS OF CONFIDENCE TEST DISPLAY TARGET REGIS
GENERAL INFORMATION 1.3 USING THIS MANUAL Those users unfamiliar with debugging packages should read Chapter 1 before attempting to use CPU32Bug. This provides information about CPU32Bug structure and capabilities. Paragraph 1.4 Installation and Start-up describes a step-by-step procedure for powering up the module and obtaining the CPU32Bug prompt on the terminal screen.
GENERAL INFORMATION NOTE In order for high-baud rate serial communication between CPU32Bug and the terminal to function properly, the terminal must use XON/XOFF handshaking. If messages are garbled and have missing characters, check the terminal to verify XON/XOFF handshaking is enabled. 3. Power up the system. CPU32Bug executes a self-test and displays the sign on message (which includes version number) and the debugger prompt CPU32Bug>. 1.
GENERAL INFORMATION 1.5.3 Break The BREAK key on the terminal keyboard initiates a break. Break does not generate an interrupt. The only time break is recognized is when characters are sent or received by the debugger console. Break removes any breakpoints in the user code and keeps the breakpoint table intact. Break does not, however, take a snapshot of the machine state nor does it display the target registers. It is useful for terminating active debugger commands that are outputing large blocks of data.
GENERAL INFORMATION XXX7FF(2) INTERNAL RAM(1) XXX000 FFFFFF MCU INTERNAL MODULES FFF000 OPTIONAL FPCP(3) PFB(4): U5 FFE800 800000 ALTERNATE MCU INTERNAL MODULES LOCATION (see APPENDIX C) 7FF000 OPTIONAL RAM/EPROM PFB: U2 & U4 CPU32BUG EPROM BCC: U4 OPTIONAL RAM PFB: U1 & U3 TARGET RAM BCC: U2 & U3 SYSTEM RAM BCC: U2 & U3 110000 /120000(5) 100000 0E0000 CPU32BUG STACK 020000 CPU32BUG INTERNAL VARIABLES CPU32BUG VECTOR TABLE 010000 003000 TARGET VECTOR TABLE 000000 (1) Consult the MCU device
GENERAL INFORMATION 1.7 TERMINAL INPUT/OUTPUT CONTROL When entering a command at the prompt, the following control codes may have a caret, " ^ ", preceding the character, this indicates that the Control or CTRL key must be held down while striking the character key). ^X (Cancel line) The cursor is backspaced to the beginning of the line. ^H (backspace) The cursor is moved back one position. The character at the new cursor position is erased. (delete/rubout) Performs the same function as ’’^H’’.
GENERAL INFORMATION M68CPU32BUG/D REV 1 1-8
DEBUG MONITOR DESCRIPTION CHAPTER 2 DEBUG MONITOR DESCRIPTION 2.1 INTRODUCTION CPU32Bug performs various operations in response to user commands entered at the keyboard. When the debugger prompt CPU32Bug> appears on the terminal screen the debugger is ready to accept commands. 2.2 ENTERING DEBUGGER COMMAND LINES As the command line is entered it is stored in an internal buffer. Execution begins only after the carriage return is entered.
DEBUG MONITOR DESCRIPTION The commands use a modified Backus-Naur syntax. The meta-symbols are: <> The angular brackets enclose a symbol, known as a syntactic variable. The syntactic variable is replaced in a command line by one of a class of symbols it represents. [] Square brackets enclose an optional symbol. The enclosed symbol may occur zero or one time. In some cases, where noted, square brackets are required characters. []...
DEBUG MONITOR DESCRIPTION 2.2.1.1 Expression as a Parameter An expression is one or more numeric values separated by the arithmetic operators: + plus – minus * multiplied by / divided by & logical AND << shift left >> shift right Base identifiers define numeric values as either a hexadecimal, decimal, octal or binary number.
DEBUG MONITOR DESCRIPTION EXAMPLES Valid expressions. Expression Result (in hex) FF0011 FF0011 45+99 DE &45+&99 90 @35+@67+@10 5C %10011110+%1001 A7 88<<10 00880000 AA&F0 A0 The total value of the expression must be between 0 and $FFFFFFFF. 2.2.1.2 Address as a Parameter Many commands use as a parameter. The syntax accepted by CPU32Bug is similar to the one accepted by the MC68300 Family one-line assembler. All control addressing modes are allowed.
DEBUG MONITOR DESCRIPTION Table 2-1. Debugger Address Parameter Format Format Example Description N 140 Absolute address+contents of automatic offset register. N+Rn 332+R5 Absolute address+contents of the specified offset register (not an assembler-accepted syntax). (An) (A1) Address register indirect. (d,An) or d(An) (120,A1) 120(A1) Address register indirect with displacement (two formats accepted).
DEBUG MONITOR DESCRIPTION EXAMPLE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ****** ****** A portion of the listing file of a re-locatable module assembled with the MC68300 Family DOS resident assembler is shown below: 0 0 0 0 0 0 0 0 00000000 00000004 00000006 00000008 0000000A 0000000C 00000010 00000014 48E78080 4280 1018 5340 12D8 51 C8FFFC 4CDF0101 * * MOVE STRING SUBROUTINE * MOVESTR MOVEM.L D0/A0,-(A7) CLR.L D0 MOVE.B (A0)+,D0 SUBQ.W #1,D0 LOOP MOVE.B (A0)+,(A1)+ MOVS DBRA D0,LOOP MOVEM.
DEBUG MONITOR DESCRIPTION 2.2.2 Port Numbers Some CPU32Bug commands allow the user to decide which port is the input or output port. Valid port numbers are: 0 - MCU SCI Port (RS-232C communication port; P4 on the BCC and P9 on the PFB) Although CPU32Bug supports other ports (see PF command), there is no hardware present on the BCC to support additional ports. Thus the commands which allow port numbers (DU, LO, PF, VE) can only use port 0.
DEBUG MONITOR DESCRIPTION 2.5.1 CPU32Bug Vector Table and Workspace CPU32Bug requires 12k bytes of RAM to operate. On power-up or reset, CPU32Bug allocates this memory space. The first 1024-bytes are reserved as a user program vector table area and the second 1024-bytes are reserved as an exception vector table for use by the debugger. Next, CPU32Bug reserves space for static variables and initializes these variables to predefined default values.
DEBUG MONITOR DESCRIPTION EXAMPLE Trace one instruction using debugger. CPU32Bug>RD PC =00003000 SR SFC =5=SD DFC D0 =00000000 D1 D4 =00000000 D5 A0 =00000000 A1 A4 =00000000 A5 00003000 203900100000 CPU32Bug>T PC =00003006 SFC =5=SD D0 =12345678 D4 =00000000 A0 =00000000 A4 =00000000 00003006 D280 CPU32Bug> =2700=TR:OFF_S_7_..... =5=SD USP =00003830 =00000000 D2 =00000000 =00000000 D6 =00000000 =00000000 A2 =00000000 =00000000 A6 =00000000 MOVE.L ($100000).L,D0 SR =2700=TR:OFF_S_7_.....
DEBUG MONITOR DESCRIPTION 2.5.2.2 Creating Vector Tables A user program may create a separate vector table to store its exception vectors. If this is done, the user program must change the value of the vector base register to point to the new vector table. To use the debugger facilities, copy the vectors from the CPU32Bug vector table into the corresponding user vector table locations (block of memory move (BM) command).
DEBUG MONITOR DESCRIPTION EXAMPLE The user exception handler passes an exception along to the debugger. * *** EXCEPT - Exception handler **** * EXCEPT SUBQ.L LINK MOVEM.L #4,A7 A6,#0 A0-A5/D0-D7,-(A7) Save space in stack for a PC value. Frame pointer for accessing PC space. Save registers. : decide here if user code will handle exception, if so, branch... MOVE.L MOVE.W AND.W MOVE.L UNLK RTS BUFVBR,A0 14(A6), Do #$0FFF,D0 (A0,D0.W),4(A6) Pass exception to debugger; Get VBR.
DEBUG MONITOR DESCRIPTION Before the normal register display information is printed, the exception type information is displayed. This includes the type of exception with its format/vector word and the following: Mnemonic Description Offset SSW Special Status Word +$16 Fault Addr. Faulted Address +$10 Data Data +$0C Cur. PC Program Counter +$02 Cnt. Reg. Internal Transfer Count Register +$14 The upper nibble of the count register (Cnt. Reg.
DEBUG MONITOR DESCRIPTION The valid function code mnemonics are: Function Code Mnemonic Description 0 F0 Unassigned, reserved 1 UD User Data 2 UP User Program 3 F3 Unassigned, reserved 4 F4 Unassigned, reserved 5 SD Supervisor Data 6 SP Supervisor Program 7 CS CPU Space Cycle The BR, GD, GO, and GT commands set the valid function codes to either a user program (UP) or supervisor program (SP).
DEBUG MONITOR DESCRIPTION M68CPU32BUG/D REV 1 2-14
DEBUG MONITOR COMMANDS CHAPTER 3 DEBUG MONITOR COMMANDS 3.1 INTRODUCTION This chapter contains descriptions and examples of the CPU32Bug debugger commands. Table 3-1 summarizes these commands. Table 3-1. Debug Monitor Commands Command Mnemonic Title Paragraph BC Block of Memory Compare 3.2 BF Block of Memory Fill 3.3 BM Block of Memory Move 3.4 BR/NOBR Breakpoint Insert/Delete 3.5 BS Block of Memory Search 3.6 BV Block of Memory Verify 3.7 DC Data Conversion 3.
DEBUG MONITOR COMMANDS Table 3-1. Debug Monitor Commands (continued) Command Mnemonic OF Title Paragraph Offset Registers Display/Modify 3.22 Printer Attach/Detach 3.23 PF Port Format 3.24 RD Register Display 3.25 Cold/Warm Reset 3.26 RM Register Modify 3.27 RS Register Set 3.28 SD Switch Directories 3.29 Trace 3.30 TC Trace On Change of Control Flow 3.31 TM Transparent Mode 3.32 TT Trace To Temporary Breakpoint 3.33 VE Verify S-Records Against Memory 3.
DEBUG MONITOR COMMANDS BC BC Block of Memory Compare 3.2 BLOCK OF MEMORY COMPARE BC [;B|W|L] options: B – Byte W – Word L – Longword The BC command compares the contents of the memory addresses defined by to another place in memory, beginning at . The option field is only allowed when is specified using a count. In this case, the B, W, or L defines the size of data to which the count is referring.
DEBUG MONITOR COMMANDS BC Block of Memory Compare CPU32Bug>BC 4000:20 4100;B Effective address: 00004000 Effective count : &32 Effective address: 00004100 CPU32Bug> Memory compares, nothing printed CPU32Bug>MM 410F;B 0000410F 21? 0.
DEBUG MONITOR COMMANDS BF BF Block of Memory Fill 3.3 BLOCK OF MEMORY FILL BF [] [;B|W|L] where: and are both expression parameters options: B – Byte W – Word L – Longword The BF command fills the specified range of memory with a data pattern. If an increment is specified, then is incremented by this value following each write, otherwise remains a constant value.
DEBUG MONITOR COMMANDS BF BF Block of Memory Fill CPU32Bug>BF 4000:10 4E71 ;B Effective address: 00004000 Effective count : &16 Truncated data = $71 CPU32Bug>MD 4000:30;B 00004000 71 71 71 71 71 71 71 71 00004010 00 00 00 00 00 00 00 00 00004020 00 00 00 00 00 00 00 00 CPU32Bug> 71 71 71 71 71 71 71 71 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 qqqqqqqqqqqqqqqq ................ ................ The specified data did not fit into the specified data field size.
DEBUG MONITOR COMMANDS BM BM Block of Memory Move 3.4 BLOCK OF MEMORY MOVE BM [;B|W|L] options: B – Byte W – Word L – Longword The BM command copies the contents of the memory addresses, defined by , to another place in memory, beginning at . The option field is only allowed when is specified using a count. In this case the B, W, or L defines the size of data to which the count is referring.
DEBUG MONITOR COMMANDS BM Block of Memory Move BM Now suppose the user would like to insert an NOP between the ADD.L instruction and the ASR.L instruction. Block move the object code down two bytes to make room for the NOP. CPU32Bug>BM 6002 600B 6004 Effective address: 00006002 Effective address: 0000600B Effective address: 00006004 CPU32Bug>MD 6000 600C;DI 00006000 D480 00006002 E2A2 00006004 E2A2 00006006 2602 00006008 4E4F 0000600C 4E71 ADD.L ASR.L ASR.L MOVE.
DEBUG MONITOR COMMANDS BR NOBR BR NOBR Breakpoint Insert Breakpoint Delete 3.5 BREAKPOINT INSERT/DELETE BR {[: ]} NOBR [] The BR command allows the user to set a target code instruction address as a breakpoint address for debugging purposes. Enter only the BR command to display the current breakpoints in the breakpoint table, or enter { [: ]} one or more times to set multiple breakpoints.
DEBUG MONITOR COMMANDS BS Block of Memory Search BS 3.6 BLOCK OF MEMORY SEARCH BS [;B|W|L] or BS [] [;B|W|L|N|V] The BS command searches the specified range of memory for a match with a user-entered data pattern. This command has three modes: Mode 1 LITERAL STRING SEARCH — executes a search for the ASCII equivalent of the literal string entered by the user. Mode 1 is indicated if is followed by a field.
DEBUG MONITOR COMMANDS BS BS Block of Memory Search In all three modes information on matches is output to the screen in a four-column format. Only 24 lines of matches are displayed on the screen at a time. A message prints at the bottom of the screen indicating there are more lines to display. Press any character key to resume output. Press the BREAK key to cancel the output and exit the command.
DEBUG MONITOR COMMANDS BS Block of Memory Search CPU32Bug>BS 3000:18,2F2F Effective address: 00003000 Effective count : &24 00003012|2F2F BS Mode 2, using with count: count is displayedin decimal, and the data pattern is found and displayed. CPU32Bug>bs 3000,302F 3d34 Effective address: 00003000 Effective address: 0000302F -not found- Mode 2: the default size is word and the data pattern is not found, so a message is output.
DEBUG MONITOR COMMANDS BV Block of Memory Verify BV 3.7 BLOCK OF MEMORY VERIFY BV [][;B|W|L] where: and are both expression parameters options: B – Byte W – Word L – Longword The BV command compares the specified range of memory against a data pattern. If an increment is specified, then is incremented by this value following each comparison, otherwise remains a constant value.
DEBUG MONITOR COMMANDS BV EXAMPLES Block of Memory Verify Assume memory from $6000 to $602F is as indicated. CPU32Bug>MD 6000:30;B 00006000 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq 00006010 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq 00006020 4E71 4E71 4E71 4E71 4E71 4E71 4E71 4E71 NqNqNqNqNqNqNqNq CPU32Bug>BV 6000 601F 4E71 Default size is Word Effective address: 00006000 Effective address: 0000601F Verify successful, nothing printed.
DEBUG MONITOR COMMANDS DC DC Data Conversion 3.8 DATA CONVERSION DC I Use the DC command to simplify an expression into a single numeric value. The equivalent value is displayed in its hexadecimal and decimal representation. If the numeric value is interpreted as a signed negative number (i.e., if the most significant bit of the 32-bit internal representation of the number is set) then both the signed and unsigned interpretations are displayed.
DEBUG MONITOR COMMANDS DU Dump S-Records DU 3.9 DUMP S-RECORDS DU [][][][] [;B|W|L] The DU command outputs data from memory in the form of Motorola S-records to a port specified by the user. If is not specified then the S-records are sent to the I/O port (port 0). For S-record information see Appendix A. The option field is only allowed when is specified using a count.
DEBUG MONITOR COMMANDS DU DU Dump S-Records Dump 10 bytes of memory beginning at $3000 to terminal screen (port 0). CPU32Bug>DU 3000:&10;B Effective address: 00003000 Effective count : &10 S0003000FC S10D3000000000040008000C00109A S9030000FC CPU32Bug> Dump memory from $4000 to $402F to host (port 1). Specify a file name of ’’TEST’’ in the S0 header record and specify an entry point of $400A.
DEBUG MONITOR COMMANDS DU Dump S-Records DU Enter ALT-F1 again to close the log file TEST.MX. The log file contains the extra lines of "Effective address" and "CPU32Bug", but they will not affect subsequent CPU32Bug load (LO) commands, as it keys on the "S" character. The file could be edited to remove the extra lines, if so desired.
DEBUG MONITOR COMMANDS GD Go Direct (Ignore Breakpoints) GD 3.10 GO DIRECT (IGNORE BREAKPOINTS) GD [] Use the GD command to start target code execution. If an address is specified, it is placed in the target PC. Execution starts at the target PC address. Under the GD command no breakpoints are inserted. Once execution of target code begins, control is returned to CPU32Bug by various conditions: • Press the ABORT switch or RESET switch of the M68300PFB Platform Board • Execute the .
DEBUG MONITOR COMMANDS GD GD Go Direct (Ignore Breakpoints) To exit target code, press ABORT pushbutton. Exception: Abort PC =0000400E SFC =0=F0 D0 =00052A9C D4 =00000000 A0 =00005000 A4 =00000000 0000400E 60FE CPU32Bug> SR DFC D1 D5 A1 A5 =2711=TR:OFF_S_7_X...C =0=F0 USP =0000FC00 =00000000 D2 =000000FF =00000000 D6 =00000000 =00000000 A2 =00000000 =00000400 A6 =00000000 BRA.B $400E Set PC to start of program and restart target code: CPU32Bug>RM PC PC =0000400E ? 4000.
DEBUG MONITOR COMMANDS GN GN Go To Next Instruction 3.11 GO TO NEXT INSTRUCTION GN Use the GN command to set a temporary breakpoint at the next instruction’s address, that is, the one following the current instruction. GN then starts target code execution. After setting the temporary breakpoint, the sequence of events is similar to that of the GO command. If there is already a breakpoint at the tempory breakpoint location, the breakpoint must have a count less than or equal to one or an error occurs.
DEBUG MONITOR COMMANDS GN GN Go To Next Instruction Use the GN command to trace through the subroutine call and display the results. CPU32Bug>GN Effective address: Effective address: At Breakpoint PC =00006008 SFC =0=F0 D0 =00000004 D4 =00000000 A0 =00000000 A4 =00000000 00006008 2600 CPU32Bug> M68CPU32BUG/D REV 1 Tempory breakpoint at $6004. Current PC at $6000. 00006008 00006004 SR DFC D1 D5 A1 A5 =2700=TR:OFF_S_7_.....
DEBUG MONITOR COMMANDS GO Go Execute User Program GO 3.12 GO EXECUTE USER PROGRAM GO [] Use the GO command (alias G) to initiate target code execution. All previously set breakpoints are enabled. If an address is specified, it is placed in the target PC. Execution starts at the target PC address. The sequence of events is: 1. An address is specified and loaded into the target PC 2.
DEBUG MONITOR COMMANDS GO GO Go Execute User Program Initialize D0, set breakpoints, and start target program: D0 =00000000 ? 52A9C. CPU32Bug>BR 4000,400E BREAKPOINTS 00004000 0000400E CPU32Bug>GO 4000 Effective address: 00004000 At Breakpoint PC =0000400E SR =2711=TR:OFF_S_7_X...C SFC =5=SD DFC =5=SD USP =0000FC00 D0 =00052A9C D1 =00000000 D2 =000000FF D4 =00000000 D5 =00000000 D6 =00000000 A0 =00000000 A1 =00000000 A2 =00000000 A4 =00000000 A5 =00000000 A6 =00000000 0000400E 60FE BRA.
DEBUG MONITOR COMMANDS GO GO Go Execute User Program Press the ABORT pushbutton on the platform board to exit target code. Exception: ABORT PC =0000400E SFC =5=SD D0 =00052A9C D4 =00000000 A0 =00000000 A4 =00000000 0000400E 60FE M68CPU32BUG/D REV 1 SR DFC D1 D5 A1 A5 =2711=TR:OFF_S_7_X.C =5=SD USP =0000FC00 =00000000 D2 =000000FF =00000000 D6 =00000000 =00000000 A2 =00000000 =00000000 A6 =00000000 BRA.
DEBUG MONITOR COMMANDS GT Go To Temporary Breakpoint GT 3.13 GO TO TEMPORARY BREAKPOINT GT [:] Use the GT command to set a temporary breakpoint and start target code execution. A count may be specified with the temporary breakpoint. Control is given at the target PC address. All previously set breakpoints are enabled. The temporary breakpoint is removed when any breakpoint with 0 count is encountered.
DEBUG MONITOR COMMANDS GT Go To Temporary Breakpoint GT CPU32Bug>GT 4006 Tempory breakpoint at $4006. Effective address: 00004006 Effective address: 00004000 Current PC at $4000. At Breakpoint PC =00004006 SR =2711=TR:OFF_S_7_X...
DEBUG MONITOR COMMANDS HE Help HE 3.14 HELP HE [] HE is the CPU32Bug help facility. HE displays all available commands and their title plus any macro commands that have been defined (see macro define/display (MA) command). All CPU32Bug commands are in alphabetical order except for NOxx and the "alias" commands. Macro commands are displayed first, in the inverse order in which they were defined.
DEBUG MONITOR COMMANDS HE Help HE SD Switch Directory T Trace Instruction TC Trace on Change of Flow TM Transparent Mode TT Trace to Temporary Breakpoint VE Verify S-Records CPU32Bug> To display the available commands in the diagnostic directory use the switch directory (SD) command and at the CPU32Diag> prompt enter HE.
DEBUG MONITOR COMMANDS HE NOMAL MD MM M MS OF PA NOPA PF RD RESET RM RS SD T TC TM TT VE CPU32Bug> Help Disable Macro Expansion Listing Memory Display Memory Modify "Alias" for previous command Memory Set Offset Registers Printer Attach Printer Detach Port Format Register Display Warm/Cold Reset Register Modify Register Set Switch Directory Trace Instruction Trace on Change of Flow Transparent Mode Trace to Temporary Breakpoint Verify S-Records To display the command TC, enter: CPU32Bug>HE TC TC Tra
DEBUG MONITOR COMMANDS LO Load S-Records From Host LO 3.15 LOAD S-RECORDS FROM HOST LO [][][;][=] Use the LO command to download a Motorola S-records format data file from a host computer to the BCC. The LO command accepts serial data from the host and loads it into on-board memory. The optional port number allows the user to specify the download port. If this number is omitted, the default is port 0.
DEBUG MONITOR COMMANDS LO Load S-Records From Host LO Other options: -C Ignore checksum. A checksum for the data contained within an S-record is calculated as the S-record is read in through the port. Normally this calculated checksum is compared to the checksum contained within the S-record. If the compare fails, an error message is sent to the screen on completion of the download. If this option is selected, then the comparison is not made. X Echo.
DEBUG MONITOR COMMANDS LO EXAMPLES Load S-Records From Host LO Suppose a host computer was used to create a program that looks like this: 1 2 3 65004000 4 5 65004000 7001 6 65004002 D088 7 65004004 4A00 8 65004006 4E75 9 END ****** TOTAL ERRORS ****** TOTAL WARNINGS * * Test Program. ORG $65004000 MOVEQ.L ADD.L TST.B RTS #1,D0 A0,D0 D0 0-0-- Then this program was converted into an S-record file named TEST.
DEBUG MONITOR COMMANDS MA NOMA Macro Define/Display Macro Delete MA NOMA 3.16 MACRO DEFINE/DISPLAY/DELETE MA [] NOMA [] The can be any combination of 1-8 alphanumeric characters. The MA command allows the user to define a complex command consisting of any number of CPU32Bug primitive commands with optional parameter specifications. By simply entering the new plus any arguments on the command line, the stored CPU32Bug commands are executed.
DEBUG MONITOR COMMANDS MA NOMA MA NOMA Macro Define/Display Macro Delete The second argument is used whenever the sequence "\1" occurs. Entering ARGUE 3000 1 ;B on the debugger command line would execute the macro named ARGUE with the text strings 3000, 1, and ;B replacing "\0", "\1", and "\2", respectively, within the body of the macro. To delete a macro, execute NOMA followed by the name of the macro. Executing NOMA without specifying a macro name deletes all macros.
DEBUG MONITOR COMMANDS MA NOMA Macro Define/Display Macro Delete CPU32Bug>MA ASM M=MM \0;DI M= CPU32Bug> Define macro ASM. CPU32Bug>MA MACRO ABC 010 MD 3000 020 GO \0 MACRO ASM 010 MD \0;DI CPU32Bug> List all macros. CPU32Bug>NOMA CPU32Bug> Delete all macros. CPU32Bug>MA NO MACROS DEFINED CPU32Bug> List all macros.
DEBUG MONITOR COMMANDS MAE Macro Edit MAE 3.17 MACRO EDIT MAE [] Where: any combination of 1-8 alphanumeric characters line number in range 1-999 replacement line to be inserted The MAE command permits modification of the macro named on the command line. MAE is line oriented and supports the following actions: insertion, deletion, and replacement.
DEBUG MONITOR COMMANDS MAE Macro Edit EXAMPLES CPU32Bug>MA MACRO ABC 010 MD 3000 020 GO \0 CPU32Bug> List definitions of macro ABC. CPU32Bug>MAE ABC 15 RD MACRO ABC 010 MD 3000 020 RD 030 GO \0 CPU32Bug> Add a line to macro ABC. CPU32Bug>MAE ABC 10 MD 10+R0 MACRO ABC 010 MD 10+R0 020 RD 030 GO \0 CPU32Bug> Replace line 10. CPU32Bug>MAE ABC 30 MACRO ABC 010 MD 10+R0 020 RD CPU32Bug> Delete line 30. M68CPU32BUG/D REV 1 This line was inserted. This line was overwritten.
DEBUG MONITOR COMMANDS MAL NOMAL Macro Expansion Listing Enable Macro Expansion Listing Disable MAL NOMAL 3.18 MACRO EXPANSION LISTING ENABLE/DISABLE MAL NOMAL The MAL command allows the user to view expanded macro lines as they are executed. This is especially useful when errors result, as the line with the error appears on the display. The NOMAL command is used to suppress the listing of macro lines during execution.
DEBUG MONITOR COMMANDS MD MD Memory Display 3.19 MEMORY DISPLAY MD[S] [:|][; [B|W|L|DI]] Use the MD command to display the contents of multiple memory locations. MD accepts the following data types: Integer Data Type B – Byte W – Word L – Longword The default data type is word (W). Integer data types are always displayed in both hex and ASCII. The DI option enables the resident MCU disassembler. No other option is allowed if DI is selected.
DEBUG MONITOR COMMANDS MD CPU32Bug>md 00005008 0000500C 00005012 00005016 0000501A 0000501C 0000501E 00005020 CPU32Bug> MD Memory Display 5008;di 46FC2700 61FF0000023E 4E7AD801 41ED7FFC 5888 2E48 2C48 13C7FFFB003A MOVE.W BSR.L MOVEC.L LEA.L ADDQ.L MOVE.L MOVE.L MOVE.B #$2700,SR #$524C VBR,A5 $7FFC(A5),A0 #$4,A0 A0,A7 A0,A6 D7,($FFFB003A).L NOTE If the address location requested is not displayed, the automatic offset register is non-zero and has been added to the address.
DEBUG MONITOR COMMANDS MM Memory Modify MM 3.20 MEMORY MODIFY MM [;[[B|W|L][A][N]]|[DI]] Use the MM command (alias M) to examine and change memory locations. MM accepts the following data types: Integer Data Type B – Byte W – Word L – Longword The default data type is word. The MM command (alias M) reads and displays the contents of memory at the specified address and prompts the user with a question mark ( ? ).
DEBUG MONITOR COMMANDS MM MM Memory Modify EXAMPLES CPU32Bug>MM 3100 00003100 1234? 00003102 5678? 4321 00003104 9ABC? 8765^ 00003102 4321? 00003100 1234? abcd. Access location 3100. CPU32Bug>MM 3001;LA 00003001 CD432187? 00003009 00068010? 68010+10= 00003009 00068020? 00003009 00068020? . Longword access to location 3001. Alternate location accesses. Modify and re-open location. No change, re-open still utilized. Exit MM.
DEBUG MONITOR COMMANDS MS Memory Set MS 3.21 MEMORY SET MS {hexadecimal number}/{’string’} Use the MS command to write data to memory starting at a specified address. Hex numbers are not size specific, so they can contain any number of digits (as allowed by command line buffer size). If an odd number of digits is entered, the least significant nibble of the last byte accessed is unchanged. ASCII strings are entered by enclosing them in single quotes (’string’).
DEBUG MONITOR COMMANDS OF Offset Registers Display/Modify OF 3.22 OFFSET REGISTERS DISPLAY/MODIFY OF [Rn[;A]] The OF command allows the user to access and change pseudo-registers called offset registers. These registers are used to simplify the debugging of relocatable and position independent modules (refer to offset registers in paragraph 2.1.1.3). There are 8 offset registers (R0 through R7), but only R0 through R6 can be changed. Both the base and top addresses of R7 is always set to 0.
DEBUG MONITOR COMMANDS OF Offset Registers Display/Modify OF Offset register rules: • At power-up and cold-start reset, R7 is the automatic register, and all offset registers have both base and top addresses preset to 0. This disables the offset registers. • R7 always has both base and top addresses set to 0; it cannot be changed. • Any offset register can be set as the automatic register.
DEBUG MONITOR COMMANDS OF Offset Registers Display/Modify Set R0 as the automatic register. CPU32Bug>OF R0;A R0*=00005000 000050FF? . Display location 0 relative to the default offset register, (R0), i.e. absolute location $5000. CPU32Bug>M 0;DI 00000+R0 41F95445 5354 CPU32Bug> LEA.L ($54455354).L,A0 . Display absolute location 0, override the automatic offset. CPU32Bug>M 0+R7;DI 00000000 FFF8 CPU32Bug> M68CPU32BUG/D REV 1 DC.W 3-47 $FFF8 .
DEBUG MONITOR COMMANDS PA NOPA Printer Attached Printer Detached PA NOPA 3.23 PRINTER ATTACH/DETACH PA [] NOPA [] PA attach a printer to a specified port. NOPA detaches a printer from a specified port. When the printer is attached, everything appearing on the computer terminal is echoed to the attached printer. If no port is specified when executing PA, the default is port 1. NOPA detaches all attached printers. The port number must be in the range 0 to $1F.
DEBUG MONITOR COMMANDS PF Port Format PF 3.24 PORT FORMAT PF [] Use the PF command to display and change the serial input/output environment. Use PF to display a list of the current port assignments, configure a port that is already assigned, or assign and configure a new port. The configuration process is interactive, much like modifying registers or memory (RM and MM commands). An interlock is provided prior to configuring the hardware, the user must explicitly direct PF to proceed.
DEBUG MONITOR COMMANDS PF PF Port Format ( the next response demonstrates reversing the prompting order ) Backup Value acceptable, exit interactive mode. Note: Carriage return not required. XON/XOFF protocol [Y,N] = Y? ^ Stop Bits [1,2] = 2? . OK to proceed (y/n)? Y CPU32Bug> 3.24.3 Port Format Parameters The port format parameters are: • Port base address – When assigning a port, there is a set base address option.
DEBUG MONITOR COMMANDS PF Port Format PF 3.24.4 New Port Assignment PF supports a set of drivers for a number of different boards and ports. To assign one of these to a previously unassigned port number, execute the command with that port number. A message is then printed to indicate that the port is unassigned and a prompt issued to request the type of serial communication device. Pressing RETURN at this point lists the currently supported boards and ports.
DEBUG MONITOR COMMANDS RD Register Display RD 3.25 REGISTER DISPLAY RD {[+|-|=][][/]}{[+|-|=][[-]][/]} Use the RD command to display the target state, that is, the register state associated with the target program (refer to the GO command). The target PC points to the instruction to be disassembled and displayed. Internally, a register mask specifies which registers are displayed when RD is executed. At reset time, this mask is set to display the MPU registers only.
DEBUG MONITOR COMMANDS RD Register Display RD Observe the following when specifying any arguments in the command line: • The qualifier is applied to the next register range only. • If no qualifier is specified, a + qualifier is assumed. • All device names should precede register names.
DEBUG MONITOR COMMANDS RD RD Register Display EXAMPLES CPU32Bug>rd PC =00003000 SFC =0=F0 D0 =00000000 D4 =00000000 A0 =00000000 A4 =00000000 00003000 424F CPU32Bug> SR DFC D1 D5 A1 A5 =2700=TR:OFF_S_7_..... =0=F0 USP =0000F830 =00000000 D2 =00000000 =00000000 D6 =00000000 =00000000 A2 =00000000 =00000000 A6 =00000000 DC.W $424F VBR SSP* D3 D7 A3 A7 =00000000 =00004000 =00000000 =00000000 =00000000 =00004000 NOTES An asterisk following a stack pointer name indicates an active stack pointer.
DEBUG MONITOR COMMANDS RD RD Register Display The source and destination function code registers (SFC, DFC) include a two character mnemonic: Function Code Mnemonic 0 1 2 3 4 5 6 7 F0 UD UP F3 F4 SD SP CS Description Undefined User Data User Program Undefined Undefined Supervisor Data Supervisor Program CPU Space To set the display to D6 and A3 only.
DEBUG MONITOR COMMANDS RESET Cold/Warm Reset RESET 3.26 COLD/WARM RESET RESET Use the RESET command to specify the reset operation level when a RESET exception is detected by the processor. Press the RESET switch on the M68300PFB platform board to generate a reset exception. Two RESET levels are available: COLD This is the standard mode of operation, and is the default at power-up. In this mode all the static variables are initialized every time a reset is executed.
DEBUG MONITOR COMMANDS RM Register Modify RM 3.27 REGISTER MODIFY RM Use the RM command to display and change the target registers. The RM command functions in essentially the same way as the MM command, and the same step control characters are used to control the display/change session. Refer to the MM command. EXAMPLES CPU32Bug>RM D4 D5 =12345678? ABCDEF^ D4 =00000000? 3000. CPU32Bug> Modify register and backup. Modify register and exit.
DEBUG MONITOR COMMANDS RS Register Set RS 3.28 REGISTER SET RS [][;A] Use the RS command to display or change a single target register. The default offset register value is always added to unless overridden by specifically including an offset register. See the OF (offset register) command. The ;A option is only valid when is an offset register, i.e. R0 - R7. Use the ;A option to set as the automatic register. If R7 is specified, no is allowed (R7 cannot be changed).
DEBUG MONITOR COMMANDS SD Switch Directories SD 3.29 SWITCH DIRECTORIES SD Use the SD command to toggle between the debugger directory and the diagnostic directory. Use the HE (Help) command to list the current directory commands. Directory structure allows access to the debugger commands from either directory but the diagnostic commands are only available from the diagnostic directory.
DEBUG MONITOR COMMANDS T T Trace 3.30 TRACE T [] Use the T command to execute one instruction at a time and display the target state after execution. T starts tracing at the address in the target PC. The optional count field specifies the number of instructions to be traced before returning control to CPU32Bug. The count field default is 1. As each instruction is traced, a register display printout is generated.
DEBUG MONITOR COMMANDS T T Trace Display target registers and trace one instruction: CPU32Bug>RD PC =00007000 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007000 2200 CPU32Bug>T PC =00007002 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007002 4282 CPU32Bug> SR DFC D1 D5 A1 A5 =2700=TR:OFF_S_7_..... =0=F0 USP =0000382C =00000000 D2 =002003A2 =00000000 D6 =00000000 =00000000 A2 =00000000 =00000000 A6 =00000000 MOVE.
DEBUG MONITOR COMMANDS T T Trace Trace the next two instructions: CPU32Bug>T 2 PC =00007006 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007006 E289 PC =00007008 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007008 66FA CPU32Bug> M68CPU32BUG/D REV 1 SR DFC D1 D5 A1 A5 SR DFC D1 D5 A1 A5 =2700=TR:OFF_S_7_..... =0=F0 USP =0000382C =0008F41C D2 =0000001C =00000000 D6 =00000000 =00000000 A2 =00000000 =00000000 A6 =00000000 LSR.L #$1,D1 =2700=TR:OFF_S_7_ .....
DEBUG MONITOR COMMANDS TC Trace On Change Of Control Flow TC 3.31 TRACE ON CHANGE OF CONTROL FLOW TC [] Use the TC command to start execution at the address in the target PC. Tracing begins at detection of an instruction that causes a change of control flow, such as Bcc, JSR, BSR, RTS, etc. Execution is in real time until a change of flow instruction is encountered. The optional count field specifies the number of change of flow instructions to be traced before returning control to CPU32Bug.
DEBUG MONITOR COMMANDS TC TC Trace On Change Of Control Flow Trace on change of flow: CPU32Bug>TC 00007008 66FA PC =00007004 SFC =0=F0 D0 =0008F41C D4 =00000000 A0 =00000000 A4 =00000000 00007004 D401 CPU32Bug> SR DFC D1 D5 A1 A5 BNE.B $7004 =2700=TR:OFF_S_7_..... =0=F0 USP =0000382C =00047A0E D2 =0000001C =00000000 D6 =00000000 =00000000 A2 =00000000 =00000000 A6 =00000000 ADD.B D1,D2 Note that the above display also shows the change of flow instruction.
DEBUG MONITOR COMMANDS TM Transparent Mode TM 3.32 TRANSPARENT MODE TM [][] The TM command connects the console serial port and the host port together, allowing the user to communicate with a host computer. A message displayed by TM shows the current escape character, i.e., the character used to exit the transparent mode. The two ports remain connected until the escape character is received by the console port.
DEBUG MONITOR COMMANDS TT Trace To Temporary Breakpoint TT 3.33 TRACE TO TEMPORARY BREAKPOINT TT Use the TT command to set a temporary breakpoint at a specified address and trace until encountering a 0 count breakpoint. The temporary breakpoint is then removed (TT is analogous to the GT command) and control is returned to CPU32Bug. Tracing starts at the target PC address. As each instruction is traced, a register display printout is generated.
DEBUG MONITOR COMMANDS TT TT Trace To Temporary Breakpoint Trace to temporary breakpoint: CPU32Bug>TT 7006 PC =00007002 SR SFC =0=F0 DFC D0 =0008F41C D1 D4 =00000000 D5 A0 =00000000 A1 A4 =00000000 A5 00007002 4282 PC =00007004 SR SFC =0=F0 DFC D0 =0008F41C D1 D4 =00000000 D5 A0 =00000000 A1 A4 =00000000 A5 00007004 D401 At Breakpoint PC =00007006 SR SFC =0=F0 DFC D0 =0008F41C D1 D4 =00000000 D5 A0 =00000000 A1 A4 =00000000 A5 00007006 E289 CPU32Bug> M68CPU32BUG/D REV 1 =2700=TR:OFF_S_7_.....
DEBUG MONITOR COMMANDS VE Verify S-Records Against Memory VE 3.34 VERIFY S-RECORDS AGAINST MEMORY VE [][][;][=] VE is identical to the LO command with the exception that data is not stored to memory but merely compared to the contents of memory. The VE command accepts serial data from a host system in the form of a Motorola S-records file and compares it to data already in memory. If the data does not compare, then the user is alerted via information sent to the terminal screen.
DEBUG MONITOR COMMANDS VE Verify S-Records Against Memory VE host system does not echo characters that the first record transferred by the host system be a header record. The header record is not used, but the LF after the header record serves to break VE out of the loop so that data records are processed. Other VE options are: -C option Ignore checksum. A checksum for the data contained within an S-Record is calculated as the S-record is read in at the port.
DEBUG MONITOR COMMANDS VE Verify S-Records Against Memory VE Then converted into an S-Record file named TEST.MX as follows: S00A0000544553542E4D58E2 S30D650040007001D0884A004E7577 S7056500400055 This file was downloaded into memory using "LO -65000000" at address $4000. The program may be examined in memory using the MD (memory display) command. CPU32Bug>MD 4000:4;DI 00004000 7001 MOVEQ.L 00004002 D088 ADD.L 00004004 4A00 TST.
DEBUG MONITOR COMMANDS VE Verify S-Records Against Memory VE Now change the program in memory and perform the verification again. CPU32Bug>M 4002 00004002 D088 ? D089. CPU32Bug>VE -65000000 Blank line as the BCC waits for an S-record. Enter the terminal emulator’s escape key to return to the host computer’s operating system (ALTF4 for ProComm).
DEBUG MONITOR COMMANDS M68CPU32BUG/D REV 1 3-72
ASSEMBLER/DISASSEMBLER CHAPTER 4 ASSEMBLER/DISASSEMBLER 4.1 INTRODUCTION Included as part of the CPU32Bug firmware is a one-line assembler/disassembler function. The assembler is an interactive assembler/editor in which the source program is not saved. Each source line is translated into M68300 Family machine language code and is stored line-by-line into memory as it is entered. In order to display an instruction, the machine code is disassembled and the instruction mnemonic and operands are displayed.
ASSEMBLER/DISASSEMBLER 4.1.2 M68300 Family Resident Structured Assembler Comparison There are several major differences between the CPU32Bug assembler and the M68300 Family resident structured assembler. The resident assembler is a two-pass assembler that processes an entire program as a unit, while the CPU32Bug assembler processes each line of a program as an individual unit.
ASSEMBLER/DISASSEMBLER 4.2.1 Source Line Format Each source statement is a combination of operation and, as required, operand fields. Line numbers, labels and comments are not used. 4.2.1.1 Operation Field Since there is no label field, the operation field may begin in the first available column. It may also follow one or more spaces. Entries can consist of one of three categories: • Operation codes which correspond to the M68300 Family instruction set. • Define constant directive (DC.
ASSEMBLER/DISASSEMBLER 4.2.1.2 Operand Field If present, the operand field follows the operation field and is separated from the operation field by at least one space. When two or more operand subfields appear within a statement, separate them with a comma. In an instruction like ’ADD D1,D2’, the first subfield (D1) is called the source effective address () field, and the second subfield (D2) is called the destination field.
ASSEMBLER/DISASSEMBLER 4.2.1.4 Mnemonics and Delimiters The assembler recognizes all M68300 Family instruction mnemonics. Numbers are recognized as binary, octal, decimal, and hexadecimal, with hexadecimal as the default case. • Decimal values are preceded by an ampersand (&). Examples are: &12334 -&987654321 • Hexadecimal values are preceded by a dollar sign ($). An example is: $AFE5 One or more ASCII characters enclosed by single quote marks ( ’ ) constitute an ASCII string.
ASSEMBLER/DISASSEMBLER 4.2.1.5 Character Set The character set recognized by the CPU32Bug assembler is a subset of ASCII and listed below: • The letters A through Z (uppercase and lowercase) • The integers 0 through 9 • Arithmetic operators: +, -, *, /, <<, >>, !, & • Parentheses ( ) • Characters used as special prefixes: # (pound sign) specifies the immediate form of addressing. $ (dollar sign) specifies a hexadecimal number. & (ampersand) specifies a decimal number.
ASSEMBLER/DISASSEMBLER Table 4-1 summarizes the CPU32Bug one-line assembler addressing modes. Table 4-1.
ASSEMBLER/DISASSEMBLER Allowed operators are: Addition Subtraction Multiply Divide Shift left Shift right Bitwise or Bitwise and + * / << >> ! & The order of evaluation is strictly left to right with no precedence granted to some operators over others. The only exception is when the user forces the order of precedence via the use of parentheses. Possible points of confusion: • Differentiate numbers and registers to avoid confusion. For example: CLR D0 means CLR.W register D0.
ASSEMBLER/DISASSEMBLER When specifying operands, the user may skip or omit entries with the following addressing modes. • Address register indirect with index, base displacement. • Program counter indirect with index, base displacement. For the above modes, the rules for omission/skipping are as follows: • The user may terminate the operand by specifying ’’)’’. EXAMPLE CLR CLR CLR • The user may skip a field by stepping past it with a comma. EXAMPLE CLR CLR but CLR CLR 4.2.
ASSEMBLER/DISASSEMBLER EXAMPLES 00010022 00010024 00010026 00010028 0001002A 4.2.4 04D2 AAFE 4142 5443 0043 DC.W DC.W DC.W DC.W DC.W DESCRIPTION 1234 &AAFE ’AB’ ’TB’+1 ’C’ Decimal number Hexadecimal number ASCII String Expression ASCII character is right justified System Call Directive (SYSCALL) This directive aids the user in making the TRAP #15 calls to the system functions.
ASSEMBLER/DISASSEMBLER 4.3.1 Executing the Assembler/Disassembler The assembler/disassembler is actuated using the ;DI option of the MM (Memory Modify) and MD (Memory Display) commands: MM ;DI where . sequences to next instruction exits command and MD[S] [:I];DI Use the MM (;DI option) to enter and modify the program. When this command is used, the memory contents at the specified location are disassembled and displayed.
ASSEMBLER/DISASSEMBLER 4.3.3 Entering Branch and Jump Addresses When entering a source line containing a branch instruction (BRA, BGT, BEQ, etc) do not enter the offset to the branch’s destination in the instruction operand field. The offset is calculated by the assembler. The user must append the appropriate size extension to the branch instruction. To reference a current location in an operand expression use the asterisk (*) character.
SYSTEM CALLS CHAPTER 5 SYSTEM CALLS 5.1 INTRODUCTION This chapter describes the CPU32Bug TRAP #15 handler, which allows system calls from user programs. System calls access selected functional routines contained within CPU32Bug, including input and output routines. TRAP #15 also transfers control back to CPU32Bug at the end of a user program (refer to the .RETURN function, paragraph 5.2.16).
SYSTEM CALLS It is necessary to create an equate file with the routine names equated to their respective codes, or download the archive file C32SCALL.ARC from the Motorola FREEWARE Bulletin Board (BBS). For more information on the FREEWARE BBS, reference customer letter M68xxxEVx/L2. When using the CPU32Bug one-line assembler/disassembler, the SYSCALL macro and the equates are pre-defined. Input: SYSCALL, space, function, carriage return.
SYSTEM CALLS Table 5-1. CPU32Bug System Call Routines Function Trap Code Description .BINDEC $0064 Convert binary to Binary Coded Decimal (BCD) .CHANGEV $0067 Parse value .CHKBRK $0005 Check for break .DELAY $0043 Timer delay function .DIVU32 $006A Divide two 32-bit unsigned integers .ERASLN $0027 Erase line .INCHR $0000 Input character .INLN $0002 Input line (pointer/pointer format) .INSTAT $0001 Input serial port status .
SYSTEM CALLS .BINDEC 5.2.1 Calculate BCD Equivalent Specified Binary Number .BINDEC Calculate BCD Equivalent Specified Binary Number SYSCALL .BINDEC TRAP CODE: $0064 This function takes a 32-bit unsigned binary number and changes it to its equivalent BCD (Binary Coded Decimal Number). Entry Conditions: SP ==> Argument: Hex number Space for result <2 long> Exit Conditions: SP ==> Decimal number (2 Most Significant Digits) (8 Most Significant Digits) EXAMPLE SUBQ.L MOVE.L SYSCALL MOVEM.
SYSTEM CALLS .CHANGEV 5.2.2 Parse Value, Assign to Variable .CHANGEV Parse Value, Assign to Variable SYSCALL .CHANGEV TRAP CODE: $0067 Parse a value in the user specified buffer. If the user specified buffer is empty, the user is prompted for a new value, otherwise update the integer offset into the buffer to skip the value. The new value is displayed and assigned to the variable unless the user’s input is an empty string.
SYSTEM CALLS .CHANGEV Parse Value, Assign to Variable .CHANGEV If the above code was called with a syscall routine and BUFFER contained ’’1 3’’ in pointer/count format and POINT contained 2 (longwords), then COUNT would be assigned the value 3, and POINT would contain 4 (pointing to first character past 3). Note that POINT is the offset of the buffer start address (not the address of the first character in the buffer) to the next character to process.
SYSTEM CALLS .CHKBRK 5.2.3 Check for Break .CHKBRK Check for Break SYSCALL .CHKBRK TRAP CODE: $0005 Returns zero (0) status in condition code register if break status is detected at the default input port. Entry Conditions: No arguments or stack allocation required Exit Conditions: Z flag set in CCR if break detected EXAMPLE SYSCALL BEQ .
SYSTEM CALLS .DELAY 5.2.4 Timer Delay Function .DELAY Timer Delay Function SYSCALL .DELAY TRAP CODE: $0043 The .DELAY function generates timing delays based on the processor clock. This function uses the MCU periodic interrupt timer for operation. The user specifies the desired delay count (number of interrupt pulses generated). .DELAY returns system control to the user after the specified delay is completed. Initialize (.TM_INI) and start (.TM_STR0) the timer before using the .TM_RD function.
SYSTEM CALLS .DIVU32 5.2.5 Unsigned 32 x 32 Bit Divide .DIVU32 Unsigned 32 x 32 Bit Divide SYSCALL .DIVU32 TRAP CODE: $006A Divide two 32-bit unsigned integers and return the quotient on the stack as a 32-bit unsigned integer. The case of division by zero is handled by returning the maximum unsigned value $FFFFFFFF.
SYSTEM CALLS .ERASLN 5.2.6 Erase Line Erase Line SYSCALL .ERASLN TRAP CODE: $0027 Use .ERASLN to erase the line at the present cursor position. Entry Conditions: No arguments required. Exit Conditions: The cursor is positioned at the beginning of a blank line. EXAMPLE SYSCALL .ERASLN M68CPU32BUG/D REV 1 5-10 .
SYSTEM CALLS .INCHR 5.2.7 Input Character Routine Input Character Routine SYSCALL .INCHR TRAP CODE: $0000 Reads a character from the default input port. The character remains in the stack. Entry Conditions: SP ==> Space for character Word fill Exit Conditions: SP ==> Character Word fill EXAMPLE SUBQ.L #2,A7 SYSCALL .INCHR MOVE.B (A7)+,D0 M68CPU32BUG/D REV 1 Allocate space for result Call .INCHR Load character in D0 5-11 .
SYSTEM CALLS .INLN 5.2.8 Input Line Routine Input Line Routine SYSCALL TRAP CODE: .INLN $0002 Reads a line from the default input port. The minimum buffer size is 256 bytes. Entry Conditions: SP ==> Address of string buffer Exit Conditions: SP ==> Address of last character in the string+1 EXAMPLE If A0 contains the string destination address: SUBQ.L PEA TRAP DC.W MOVE.
SYSTEM CALLS .INSTAT 5.2.9 Input Serial Port Status .INSTAT Input Serial Port Status SYSCALL .INSTAT TRAP CODE: $0001 Checks the default input port buffer for characters. The condition codes are set to indicate the result of the operation. Entry Conditions: No arguments or stack allocation required Exit Conditions: Z (zero) = 1 if the receiver buffer is empty EXAMPLE LOOP SYSCALL BEQ.S SUBQ.L SYSCALL MOVE.B BRA.S .INSTAT EMPTY #2,A7 .
SYSTEM CALLS .MULU32 Unsigned 32 x 32 Bit Multiply .MULU32 5.2.10 Unsigned 32 x 32 Bit Multiply SYSCALL .MULU32 TRAP CODE: $0069 Multiply two 32-bit unsigned integers and return the product on the stack as a 32-bit unsigned integer. No overflow checking is performed. Entry Conditions: SP ==> 32-bit multiplier 32-bit multiplicand 32-bit space for result Exit Conditions: SP ==> 32-bit product (result from multiplication) EXAMPLE Multiply D0 by D1, load result into D2. SUBQ.L MOVE.L MOVE.
SYSTEM CALLS .OUTCHR Output Character Routine .OUTCHR 5.2.11 Output Character Routine SYSCALL .OUTCHR TRAP CODE: $0020 Outputs a character to the default output port. Entry Conditions: SP ==> Character Word fill (Placed automatically by the MCU) Exit Conditions: SP ==> Top of stack Character is sent to the default I/O port. EXAMPLE MOVE.B SYSCALL D0,-(A7) .
SYSTEM CALLS .OUTLN .OUTSTR Output String Using Pointers .OUTLN .OUTSTR 5.2.12 Output String Using Pointers SYSCALL .OUTLN TRAP CODE: $0022 SYSCALL .OUTSTR TRAP CODE: $0021 .OUTSTR outputs a string of characters to the default output port. .OUTLN outputs a string of characters followed by a sequence.
SYSTEM CALLS .PCRLF Print Carriage Return and Line Feed .PCRLF 5.2.13 Print Carriage Return and Line Feed SYSCALL .PCRLF TRAP CODE: $0026 .PCRLF sends a carriage return and a line feed to the default output port. Entry Conditions: No arguments or stack allocation required. Exit Conditions: None EXAMPLE SYSCALL .
SYSTEM CALLS .READLN Read Line to Fixed-Length Buffer .READLN 5.2.14 Read Line to Fixed-Length Buffer SYSCALL .READLN TRAP CODE: $0004 Reads a string of characters from the default input port. Characters echo to the default output port. A string consists of a count byte followed by the characters read from the input. The count byte indicates the number of characters read from the input as well as the number of characters in the input string, excluding carriage return and line feed .
SYSTEM CALLS .READSTR Read String Into Variable-Length Buffer .READSTR 5.2.15 Read String Into Variable-Length Buffer SYSCALL .READSTR TRAP CODE: $0003 Reads a string of characters from the default input port into a buffer. The first byte in the buffer defines the maximum number of characters that can be written to the buffer. The buffer’s size should be no less than the first byte + 2. The maximum number of characters written to a buffer is 254 characters, making the maximum buffer size 256.
SYSTEM CALLS .RETURN Return to CPU32Bug .RETURN 5.2.16 Return to CPU32Bug SYSCALL .RETURN TRAP CODE: $0063 .RETURN restores control to CPU32Bug from the target program. First, any breakpoints inserted in target code are removed. Then the target state is saved in the register image area. Finally, the routine returns to CPU32Bug. Entry Conditions: No arguments required. Exit Conditions: Control is returned to CPU32Bug. EXAMPLE SYSCALL .
SYSTEM CALLS .SNDBRK Send Break 5.2.17 Send Break SYSCALL .SNDBRK TRAP CODE: $0029 Use .SNDBRK to send a break to the default output port. Entry Conditions: No arguments or stack allocation required Exit Conditions: The default port is sent ’’break’’. EXAMPLE SYSCALL .SNDBRK M68CPU32BUG/D REV 1 5-21 .
SYSTEM CALLS .STRCMP Compare Two Strings .STRCMP 5.2.18 Compare Two Strings SYSCALL .STRCMP TRAP CODE: $0068 An equality comparison is made and a boolean flag is returned to the caller. If the strings are not identical the flag is $00, otherwise it is $FF.
SYSTEM CALLS .TM_INI Timer Initialization .TM_INI 5.2.19 Timer Initialization SYSCALL .TM_INI TRAP CODE: $0040 Use .TM_INI to initialize the MCU periodic interrupt timer. .TM_INI stops the timer and then initializes it. .TM_INI does not restart the timer; use .TM_STR0 to restart the timer. Timing is accomplished by counting the number of interrupt pulses generated. The default interrupt pulse frequency is 125 milliseconds. Use this routine the first time the timer functions are used.
SYSTEM CALLS .TM_RD Read Timer .TM_RD 5.2.20 Read Timer SYSCALL .TM_RD TRAP CODE: $0042 Use this routine to read the timer value (the timer value is the number of interrupt pulses generated). Initialize (.TM_INI) and start (.TM_STR0) the timer before using the .TM_RD function. Entry Conditions: SP ==> Space for result Exit Conditions Different From Entry:. SP ==> Time (number of interrupt pulses) . The timer keeps running after the read. EXAMPLE SUBQ.L SYSCALL MOVE.L #4,A7 .
SYSTEM CALLS .TM_STR0 Start Timer at T=0 .TM_STR0 5.2.21 Start Timer at T=0 SYSCALL .TM_STR0 TRAP CODE: $0041 Use this routine to reset the timer to 0 and start it. The user can select values for the MCU periodic interrupt timer (periodic interrupt timing register (PICR) and periodic interrupt control register (PITR)), or use the default values. The default values set the interrupt frequency to 125 milliseconds and use level 6, vector 66.
SYSTEM CALLS .TM_STR0 Start Timer at T=0 .TM_STR0 MOVE.L SYSCALL #$00000002,-(A7) .TM_STR0 Reset the timer to zero and start it with the default control value (PICR) and a period value (PITR) of $0002 (=244 usec/interrupt). MOVE.L SYSCALL #$054400A0,-(A7) .TM_STR0 Reset the timer to zero and start it with the control value (PICR) of $0544 (level 5, vector 68 = $44) and a period value (PITR) of $00A0 (=19.5 msec/interrupt).
SYSTEM CALLS .WRITD .WRITDLN ..WRITD Output String with Data .WRITDLN 5.2.22 Output String with Data SYSCALL .WRITD TRAP CODE: $0028 – Output string with data SYSCALL .WRITDLN TRAP CODE: $0025 – Output string with data and These trap functions use the monitor I/O routine which outputs a user string containing embedded variable fields. .WRITD outputs a string of characters with data and .WRITDLN outputs a string of characters with data followed by a carriage return and line feed.
SYSTEM CALLS .WRITD .WRITDLN ..WRITD Output String with Data .WRITDLN EXAMPLE The following section of code ..... ERRMESSG DC.B MOVE.L PEA PEA SYSCALL TST.L $15,’ERROR CODE = ’,’|10,8Z|’ #3,-(A5) Push error code on data stack (A5) Push data stack location ERRMESSG(PC) Push address of string .WRITDLN Invoke function (A5)+ De-allocate data from data stack . . . . .
SYSTEM CALLS .WRITE .WRITELN Output String Using Character Count .WRITE .WRITELN 5.2.23 Output String Using Character Count SYSCALL .WRITE TRAP CODE: $0023 – Output string SYSCALL .WRITELN TRAP CODE: $0024 – Output string and .WRITE and .WRITELN format character strings with a count byte and output the string to the default output port. After formatting, the count byte is the first byte in the string. The user passes the starting address of the string. .
SYSTEM CALLS .WRITE .WRITELN Output String Using Character Count .WRITE .WRITELN . . . . . prints this message: MOTOROLA QUALITY! Using .WRITELN instead of .WRITE outputs this message: MOTOROLA QUALITY! NOTE The string must be formatted such that the first byte (the byte pointed to by the passed address) contains the byte count of the string (pointer/count format – see 5.1.2).
DIAGNOSTIC FIRMWARE GUIDE CHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE 6.1 INTRODUCTION This diagnostic guide contains operation information for the CPU32Bug Diagnostic Firmware Package, hereafter referred to as CPU32Diag. Paragraph 6.3 describes utilities available to the user. Paragraphs 6.4 through 6.6 are guides to using each test. 6.2 DIAGNOSTIC MONITOR The tests described herein are called via a common diagnostic monitor, hereafter called monitor.
DIAGNOSTIC FIRMWARE GUIDE To execute a particular test, for example CPU, enter CPU X (X = the desired sub-command). This command causes the monitor to find the CPU subdirectory, and then execute the specified command from that subdirectory. EXAMPLES Single-Level Commands Two-Level Commands HE DE CPU Help Display Error Counters CPU Tests for the BCC MCU A 6.2.3 Register Test Help (HE) On-line documentation is provided in the form of a Help command (syntax: HE [command name]).
DIAGNOSTIC FIRMWARE GUIDE 6.2.7 Stop-On-Error Mode (SE) Use the stop-on-error mode (SE) to halt a test at the point where an error is detected. Enter SE then the test mnemonic to stop on errors encountered during the test. 6.2.8 Loop-Continue Mode (LC) Use loop-continue mode (LC) to endlessly repeat a test or series of tests. This command repeats testing of everything on the command line. To terminate the loop, press the BREAK key on the diagnostic video display terminal.
DIAGNOSTIC FIRMWARE GUIDE 6.2.13 Zero Pass Count (ZP) Executing this command resets the pass counter DP to zero. This is frequently desirable before entering a command that executes the loop-continue mode. Entering this command on the same line as LC results in the pass counter being reset every pass. 6.3 UTILITIES The monitor is supplemented by several utilities that are separate and distinct from the monitor itself and the diagnostics. 6.3.1 Write Loop WL.
DIAGNOSTIC FIRMWARE GUIDE 6.3.2 Read Loop RL. [ []] The RL command executes a streamlined read of specified size from a specified memory location. This command is intended as a debugging aid once specific fault areas are identified. The read loop is very short in execution so measuring devices such as oscilloscopes may be utilized in tracking failures. Pressing the BREAK key does not terminate this command, but pressing the ABORT switch or RESET switch does.
DIAGNOSTIC FIRMWARE GUIDE CPU CPU CPU Tests For The MCU 6.4 CPU TESTS FOR THE MCU CPU tests are a series of diagnostics used to test the CPU portion of the BCC MCU, as listed below (Table 6-1). Table 6-1. MCU CPU Diagnostic Tests Monitor Command Title CPU A Register Test CPU B Instruction Test CPU C Address Mode Test CPU D Exception Processing Test The normal procedure for correcting a CPU error is to replace the MCU micro-controller unit.
DIAGNOSTIC FIRMWARE GUIDE CPU A Register Test CPU A 6.4.1 Register Test CPU32Diag>CPU A CPU A executes a thorough test of all the registers in the MCU device, including checking for bits stuck high or low. EXAMPLE After the command has been issued, the following line is printed: A CPU Register test..................Running ----------> If any part of the test fails, then the display appears as follows. A CPU Register test..................Running ---------->.....
DIAGNOSTIC FIRMWARE GUIDE CPU B Instruction Test CPU B 6.4.2 Instruction Test CPU32Diag>CPU B CPU B tests various data movement, integer arithmetic, logical, shift and rotate, and bit manipulation instructions of the MCU device. EXAMPLE After the command has been issued, the following line is printed: B CPU Instruction Test ..............Running ----------> If any part of the test fails, then the display appears as follows. B CPU Instruction Test...............Running ---------->.....
DIAGNOSTIC FIRMWARE GUIDE CPU C Address Mode Test CPU C 6.4.3 Address Mode Test CPU32Diag>CPU C CPU C tests the various addressing modes of the MCU device. These include absolute address, address indirect, address indirect with post-increment, and address indirect with index modes. EXAMPLE After the command has been issued, the following line is printed:. C CPU Address Mode test..............Running ----------> If any part of the test fails, then the display appears as follows.
DIAGNOSTIC FIRMWARE GUIDE CPU D Exception Processing Test CPU D 6.4.4 Exception Processing Test CPU32Diag>CPU D CPU D tests many of the exception processing routines of the MCU, but not the interrupt auto vectors or any of the floating point co-processor vectors. EXAMPLE After the command has been issued, the following line is printed: D CPU Exception Processing Test......Running ----------> If any part of the test fails, then the display appears as follows. D CPU Exception Processing Test......
DIAGNOSTIC FIRMWARE GUIDE MT MT Memory Tests 6.5 MEMORY TESTS (MT) The memory tests are a series of diagnostics which verify random access memory (read/write) that may or may not reside on the M68300EVS evaluation system. Default is the BCC on-board RAM. To test off-board RAM, change Start and Stop Addresses per MT B and MT C as described in the following paragraphs. Memory tests are listed in Table 6-2.
DIAGNOSTIC FIRMWARE GUIDE The following describes the memory error display format for memory tests E through J. The error reporting code is designed to conform to two rules: 1. The first time an error occurs, headings are printed out prior to the printing of the values. 2. Upon 20 memory errors, the printing of error messages ceases for the remainder of the test.
DIAGNOSTIC FIRMWARE GUIDE MT A Set Function Code MT A 6.5.1 Set Function Code CPU32Diag>MT A [new value] MT A allows the user to select the function code in most of the memory tests. The exceptions to this are Program Test and TAS Test.
DIAGNOSTIC FIRMWARE GUIDE MT B Set Start Address MT B 6.5.2 Set Start Address CPU32Diag>MT B [new value] MT B allows the user to select the start address used by all of the memory tests. For the MVME332, it is suggested that address $00003000 be used. Other addresses may be used, but extreme caution should be used when attempting to test memory below this address. EXAMPLE If the user supplied the optional new value, then the display appears as follows: CPU32Diag>MT B [new value] Start Addr.
DIAGNOSTIC FIRMWARE GUIDE MT C Set Stop Address MT C 6.5.3 Set Stop Address CPU32Diag>MT C [new value] MT C allows the user to select the stop address used by all of the memory tests. The stop address is the address where testing terminates, so the stop address must be set to the last address +1. EXAMPLE If the user supplied the optional new value, then the display appears as follows: CPU32Diag>MT C [new value] Stop Addr.
DIAGNOSTIC FIRMWARE GUIDE MT D Set Bus Data Width MT D 6.5.4 Set Bus Data Width CPU32Diag>MT D [new value: 0 for 16, 1 for 32] MT D selects either 16-bit or 32-bit bus data accesses during the M68CPU32Bug MT memory tests. The width is selected by entering zero for 16 bits or one for 32 bits.
DIAGNOSTIC FIRMWARE GUIDE MT E March Address Test MT E 6.5.5 March Address Test CPU32Diag>MT E MT E performs a march address test from Start Address to Stop Address. The march address test has been implemented in this manner: 1. All memory locations from Start Address up to Stop Address are cleared to 0. 2. Beginning at Stop Address and proceeding downward to Start Address, each memory location is checked for bits that did not clear and then the contents are changed to all F’s (all the bits are set).
DIAGNOSTIC FIRMWARE GUIDE MT F Walk a Bit Test MT F 6.5.6 Walk a Bit Test CPU32Diag>MT F MT F performs a walking bit test from start address to stop address. The walking bit test for each memory location is implemented in the following manner: • Write out a 32-bit value with only the lower bit set. • Read it back and verify that the value written equals the one read. Report any errors. • Shift the 32-bit value to move the bit up one position.
DIAGNOSTIC FIRMWARE GUIDE MT G Refresh Test MT G 6.5.7 Refresh Test CPU32Diag>MT G MT G performs a refresh test from Start Address to Stop Address. The refresh test has been implemented in this manner: 1. For each memory location: • Write out value $FC84B730. • Verify that the location contains $FC84B730. • Proceed to next memory location. 2. Delay for 500 milliseconds (1/2 second). 3. For each memory location: • Verify that the location contains $FC84B730.
DIAGNOSTIC FIRMWARE GUIDE MT H Random Byte Test MT H 6.5.8 Random Byte Test CPU32Diag>MT H MT H performs a random byte test from Start Address to Stop Address. The random byte test has been implemented in this manner: 1. A register is loaded with the value $ECA86420. 2. For each memory location: • Copy the contents of the register to the memory location, one byte at a time. • Add $02468ACE to the contents of the register. • Proceed to next memory location. 3. Reload $ECA86420 into the register. 4.
DIAGNOSTIC FIRMWARE GUIDE MT I Program Test MT I 6.5.9 Program Test CPU32Diag>MT I MT I moves a program segment into RAM and executes it. The implementation of this is: 1. The program is moved into the RAM, repeating it as many times as necessary to fill the available RAM (i.e., from Start Address to Stop Address-8). Only complete segments of the program are moved. The space remaining from the last program segment copied into the RAM to Stop Address-8 is filled with NOP instructions.
DIAGNOSTIC FIRMWARE GUIDE MT J Test and Set Test MT J 6.5.10 Test and Set Test CPU32Diag>MT J MT J performs a Test and Set (TAS) test from Start Address to Stop Address. The test for each memory location is implemented as follows: • Clear the memory location to 0. • Test And Set the location (should set upper bit only). • Verify that the location now contains $80. • Proceed to next location (next byte). EXAMPLE After the command is entered, the display should appear as follows: J MT TAS Test...
DIAGNOSTIC FIRMWARE GUIDE BERR Bus Error Test BERR 6.6 BUS ERROR TEST CPU32Diag>BERR BERR tests for local bus time-out and global bus time-out bus error conditions, including the following: • No bus error by reading from ROM • Local bus time-out by reading from an undefined FC location • Local bus time-out by writing to an undefined FC location EXAMPLE After the command has been issued, the following line is printed: BERR Bus Error Test.....................
DIAGNOSTIC FIRMWARE GUIDE M68CPU32BUG/D REV 1 6-24
S-RECORD INFORMATION APPENDIX A S-RECORD INFORMATION A.1 INTRODUCTION The S-record format for output modules was devised for the purpose of encoding programs or data files in a printable format for transportation between computer systems. The transportation process can thus be visually monitored and the S-records can be more easily edited. A.
S-RECORD INFORMATION Each record may be terminated with a CR/LF/NULL. Additionally, an S-record may have an initial field to accommodate other data such as line numbers generated by some time-sharing systems. An S-record file is a normal ASCII text file in the operating system in which it resides. Accuracy of transmission is ensured by the record length (byte count) and checksum fields. A.
S-RECORD INFORMATION A.4 S-RECORDS CREATION S-record format files may be produced by dump utilities, debuggers, linkage editors, cross assemblers or cross linkers. Several programs are available for downloading a file in S-record format from a host system to a microprocessor-based system.
S-RECORD INFORMATION The next 16 character pairs of the first S1 record are the ASCII bytes of the actual program code/data. In this assembly language example, the hexadecimal opcodes of the program are written in sequence in the code/data fields of the S1 records: OPCODE INSTRUCTION 285F 245F 2212 226A0004 24290008 237C MOVE.L MOVE.L MOVE.L MOVE.L MOVE.L MOVE.
SELF-TEST ERROR MESSAGES APPENDIX B SELF-TEST ERROR MESSAGES B.1 INTRODUCTION On power-up or reset, CPU32Bug executes a system self-test (confidence test) to verify system integrity before issuing the sign-on message (SIGNON) and monitor prompt (CPU32Bug>). If an error is detected, testing is aborted and an error message is printed after the sign on message and monitor prompt. Error messages are summarized in Table B-1.
SELF-TEST ERROR MESSAGES Table B-1.
USER CUSTOMIZATION APPENDIX C USER CUSTOMIZATION C.1 INTRODUCTION Within the CPU32Bug certain operating parameters may be customized for the user’s particular situation. This appendix details the customization features of CPU32Bug. An IBM-PC or compatible host computer with the Motorola program BCC EPROM utility (PROGBCC) is required to reprogram the EPROM on the BCC.
USER CUSTOMIZATION C.2 CPU32BUG CUSTOMIZATION The general procedure for customizing CPU32Bug is as follows: 1. Copy the parameter area from the CPU32Bug EPROM to RAM by entering the following command: CPU32Bug>BM E0000 E01FF 4000 2. Modify the parameters in RAM using the offsets shown in Table C-1. For example, the CHECKSUM value would begin at location $4000 plus offset $0E, or $400E.
USER CUSTOMIZATION 6. Verify the customized S-record file, C32B1.MX, by entering the command shown below. The -DC000 offset is required to relocate the verification from the $E0000 base address of the S-records to the RAM change area at $4000. CPU32Bug>VE -DC000 Enter the terminal emulator’s escape key to return to the host computer’s operating system (ALT-F4 for ProComm). Then enter the host command to send the S-record file to the port where the BCC is connected (type c32b.
USER CUSTOMIZATION 9. Power up the newly programmed BCC and note the checksum value indicated. Repeat steps 1 through 8 above, to set the checksum to this value but with the changes noted below. The CODESIZE parameter at offset $08 can be altered to make the checksum valid only over the CPU32Bug half of the EPROM so user code in the second half can be freely changed. Since a checksum error is simply reported on the display terminal and code execution continues, it is not mandatory to set the checksum.
USER CUSTOMIZATION C.3 CUSTOMIZATION TABLE Table C-1. CPU32Bug Customization Area Offset Default Value Mnemonic $00-03 $04-07 $08-0B $00002FFC $000E0090 $00020000 PWR_SSP PWR_PC CODESIZE $0C $20 SRECMAX $0D $FF CHECKALT $0E-0F $3033 CHECKSUM Description Power on/reset stack pointer Power on/reset program counter Size of CPU32Bug ROM in bytes: Number of bytes for checksum calculation. Must be an even number of bytes.
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Description Common Chip Select Table: (Rev. A BCC + Rev. A PFB) & (Rev. B BCC + Rev. B PFB) $3C-3D $3E-3F $0E04 $68B0 .CSBARBT .CSORBT CSBOOT base address register value and . option register value New Chip Select Table: (Rev. B BCC + Rev.
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic $70 $06 SYPCR_OR $71 $FF SYPCR_AND Description Value ORed with contents of SYPCR register at powerup/reset. Value ANDed with result value after SYPCR_OR and stored back into SYPCR. This allows user control of the write-once bits in the SYPCR, i.e., software watchdog, halt monitor, and bus monitor.
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Description ROM AUTO BOOT VECTORS $78-7B $7C-7F $FFFFFFFF $FFFFFFFF RB_SP RB_PC ROM auto boot stack pointer value ROM auto boot program counter value: Bit 0 = 1 disables auto boot (odd address) = 0 enables auto boot (even address). Enabling is equivalent to changing the stack pointer (SP) and program counter (PC) and entering the GO command.
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Description Console Default Table for SCI (CONSCI) (continued) $88 $01 .STOP $89 $FF .XON_ENB $8A $11 .XON $8B $13 .XOFF Stop bits (see Table C-2): 1-bit = $01 2-bit = $02 XON/XOFF enable: enable = $FF disable = $00 XON character (7-bit ASCII): ^Q = $11 XOFF character (7-bit ASCII): ^S = $13 Periodic Interrupt Timer $8C-8D $0642 .PICR $8E-8F $0102 .
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Description Power On Branch Vectors (PWR_XXX) $90-95 $60FF0000E056 $96-9B $60FF0000DEE8 PWR_INI $9C-A1 $60FF0000E070 PWR_TBL2 $A2-A7 $60FF00000004 PWR_TTL $A8-AD $60FF0000D8AA PWR_TST $AE-B3 $60FF0000D4B4 $B4-B9 $BA-BF all $FF’s all $FF’s BRA.L to Initialization Table #1 routine. See INITTBL below. BRA.L to MCU (chip selects) initialization routine: Exit: D7.
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Description Initialization Tables $D0-16F all $FF’s INITTBL Initialization Tables #1 and #2. The Initialization Table is organized as a series of entries each of which has the following format: 4 1 0|1 n <--- # bytes Where: is the destination address for the . It is 4 bytes long and must start on a even address (word) boundary.
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Initialization Tables (continued) This entry format aligns with the normal assembler output, as DC.W and DC.L are automatically aligned on an an even address (word) boundary, as seen in the examples below. Thus the byte is handled automatically by the assembler. Rel. Addr 0000 0004 DATA 0005 Opcode DC.L DC.B Operand $FFFFA21 1 Comment 1 BYTE 04 DC.B $04 0006 00FFFFA21 000A 31 DATA 000B 04 22 47 FE DC.L DC.
USER CUSTOMIZATION Table C-1. CPU32Bug Customization Area (continued) Offset Default Value Mnemonic Description Sign On Text Message $1701FF SIGNON Text string in SYSCALL .WRITE format. Default values shown in MASM assembly language format below except "^" has been substituted for each space character (" ") to show exact spacing. The Motorola copyright must be preserved. SIGNON SIGN$1 SIGN$2 DC.B DC.B DC.B DCB.B DC.B DC.B DCB.B EQU M68CPU32BUG REV 1 SIGN$2-SIGN$1 Char.
USER CUSTOMIZATION C.4 COMMUNICATION FORMATS Not all combinations of data bits, parity, and stop bits are valid for the MCU SCI. Table C-2 details the legal combinations that can be used when customizing CPU32Bug. Table C-2.
USER CUSTOMIZATION C.5 BCC REV. A CHIP SELECTION SUMMARY Table C-3 covers Rev. A of the M68332BCC Business Card Computer and M68332PFB Platform Board. Table C-3. Rev.
USER CUSTOMIZATION C.6 BCC REV. B CHIP SELECTION SUMMARY Table C-4 covers Rev. B of the M68332BCC Business Card Computer and M68332PFB Platform Board. Table C-4. Rev.
USER CUSTOMIZATION C.7 BCC REV. C CHIP SELECTION SUMMARY The table below covers Rev. C of the M68332BCC Business Card Computer and M68332PFB Platform Board. Table C-5. BCC Rev.
USER CUSTOMIZATION C.8 PLATFORM BOARD (PFB) REV. C COMPATIBILITY PFB Rev. C boards have jumpers (J8 - J13) which when installed, make Rev. C PFB’s compatible with Rev. A, Rev. B or Rev. C BCC boards . When switching jumpers from Rev. A to Rev. B or C compatibility on a Rev. C PFB, all jumpers must be set to the same selection. Table C-6. PFB Rev. C Compatibility PFB Rev. C Jumper block not installed (1) Jumpers installed for Rev. A Jumpers installed for Rev.
USER CUSTOMIZATION C.9 CPU32BUG QUESTIONS AND ANSWERS Q: How can I change the chip selections to fit my application? A: Use the Chip Select Table parameters to customize for your application. Note that there are two tables; an Old one for Rev. A BCC units and a New one for Rev. B (and later) units. The selection is based upon whether good RAM is obtained when chip select 0 and 1 are programmed using the Old Table values. Consult Tables C-3 and C-4 for chip select assignments.
USER CUSTOMIZATION Q: How can I change the Periodic Interrupt Timer (PIT) "tick" time for the SYSCALL timing functions? A: Change the Periodic Interrupt Timer .PITR parameter to alter the "tick" count. This parameter’s value is placed into the PITR register by thePWR_INI routine. Q: How can I change the default RS-232 communications parameters, such as baud rate, parity, number of data bits, stop bits, and XON/XOFF flow control? A: Use the Console Default Table for SCI (.BAUD, .PARITY, .DATA, .STOP, .
USER CUSTOMIZATION Q: After I made the parameter change for an external clock (FEXTAL) and tied MODCK low on header P2 by jumping pin 28 to 64, nothing happens when I power up the BCC, i.e., no signon message appears. Why doesn’t it work? A: The trace between pins 2 and 3 of jumper J1 on the BCC must be cut and the jumper placed over pins 1-2 of J1 before the external clock signal can reach the MCU EXTAL pin.
USER CUSTOMIZATION Q: How can I get CPU32Bug to automatically execute my user program upon power up? A: Use the ROM Auto Boot Vectors (RB_SP and RB_PC) to implement a turn-key system whereby CPU32Bug initializes itself and then loads the stack pointer (SSP) and program counter (PC), thus starting execution of the user’s program.
